ISP1362BD NXP Semiconductors, ISP1362BD Datasheet - Page 19

• Manufacturer Part Number: ISP1362BD
• Description: USB Interface IC USB OTG CONTROLLER
• Manufacturer: NXP Semiconductors

Specifications of ISP1362BD

• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Details
• Other names: ISP1362BD,157

NXP Semiconductors
ISP1362_5
Product data sheet
8.2 PIO access mode
The buffer memory is configured by DcEndpointConfiguration Registers (ECRs). Although
the control endpoint has a fixed configuration, all 16 endpoints (control OUT, control IN
and 14 programmable endpoints) must be configured before the Peripheral Controller
internally allocates the buffer. The 14 programmable endpoints can be programmed into
sizes ranging from 16 bytes to 1023 bytes, single or double buffering.
The Peripheral Controller buffer memory for each endpoint can be accessed through the
DcEndpointStatusImage registers.
The ISP1362 provides PIO mode for external microprocessors to access its internal
control registers and buffer memory. It occupies only four I/O ports or four memory
locations of a microprocessor. An external microprocessor can read or write to the internal
control registers and buffer memory of the ISP1362 through PIO operating mode.
shows the PIO interface between a microprocessor and the ISP1362.
Fig 7. Peripheral Controller buffer memory organization
Rev. 05 — 8 May 2007
Control OUT (64 bytes)
Endpoint 3 (512 bytes)
Endpoint 1 (128 bytes)
Endpoint 2 (128 bytes)
Endpoint 4 (64 bytes)
Endpoint 6 (96 bytes)
Endpoint 5 (64 bytes)
Endpoint 7 (96 bytes)
Control IN (64 bytes)
004aaa057
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
Figure 8
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