ISP1362BD NXP Semiconductors, ISP1362BD Datasheet - Page 68
ISP1362BD
Manufacturer Part Number
ISP1362BD
Description
USB Interface IC USB OTG CONTROLLER
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1362BD.pdf
(153 pages)
Specifications of ISP1362BD
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Details
Other names
ISP1362BD,157
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NXP Semiconductors
Table 32.
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
OtgAltTimer register: bit allocation
START_
13.6 OtgAltTimer register (R/W: 6Ch/ECh)
TMR
R/W
31
23
15
R
R
R
0
0
0
7
0
Table 31.
Code (Hex): 6C — read
Code (Hex): EC — write
Bit
31
30 to 24
23 to 0
30
22
14
R
R
R
0
0
6
0
-
-
OtgTimer register: bit description
Symbol
START_TMR This is the start or stop bit of the OTG timer. Writing logic 1 will cause
-
TMR_INIT_
VALUE[23:0]
29
21
13
R
R
R
0
0
5
0
-
-
Rev. 05 — 8 May 2007
Description
the OTG timer to load TMR_INIT_VALUE into the counter and start to
count. Writing logic 0 will stop the timer. This bit is automatically
cleared when the OTG timer is timed out.
0 — stop the timer
1 — start the timer
reserved
These bits define the initial value used by the OTG timer. The timer
interval is 0.01 ms. Maximum timer allowed is 167.772 s.
CURRENT_TIME[23:16]
CURRENT_TIME[15:8]
CURRENT_TIME[7:0]
28
20
12
R
R
R
0
0
4
0
-
-
reserved
27
19
11
R
R
R
0
0
3
0
-
-
Single-chip USB OTG Controller
26
18
10
R
R
R
0
0
2
0
-
-
25
17
R
R
R
0
9
0
1
0
-
-
© NXP B.V. 2007. All rights reserved.
ISP1362
67 of 152
24
16
R
R
R
0
8
0
0
0
-
-