PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 48

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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2.0 Device Architecture and Configuration
2.11.3 FDC Configuration Register
This register is reset by hardware to 24h.
Location:
Type:
Bit
Name
Reset
Bit
7
6
5
4
3
2
1
0
1: Four floppy drives are controlled with the aid of an external decoder.
TDR Register Mode
0: PC-AT compatible drive mode; i.e., bits 7-2 of the TDR are 111111b (default)
1: Enhanced drive mode
DENSEL Polarity Control
0: Active low for 500 Kbps, or 1 or 2 Mbps data rates
1: Active high for 500 Kbps, or 1 or 2 Mbps data rates (default)
FDC 2Mbps Enable. This bit is set only when a 2Mbps drive is used.
0: 2Mbps disabled and the FDC clock is 24 MHz (default)
1: 2Mbps enabled and the FDC clock is 48 MHz
Write Protect. This bit allows forcing of write protect functionality by software. When set, writes to the floppy
disk drive are disabled. This effect is identical to WP when it is active.
0: Write protected according to WP signal (default)
1: Write protected regardless of value of WP signal
PC-AT or PS/2 Drive Mode Select
0: PS/2 drive mode
1: PC-AT drive mode (default)
Reserved
TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE.
0: Disabled (default)
1: Enabled
Four-Drive Encode Enable
0: Two floppy drives are directly controlled by DR1-0, MTR1-0.
Index F0h
R/W
Four-Drive
Encode
Enable
7
0
Register
Mode
TDR
6
0
DENSEL
Polarity
Control
5
1
FDC 2Mbps
Enable
Description
48
4
0
(Continued)
Protect
Write
3
0
Mode Select
PS/2 Drive
PC-AT or
2
1
Reserved
1
0
TRI-STATE
Control
0
0