PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 8

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

www.national.com
Table of Contents
5.0
6.0
4.4
Game Port (GMP)
5.1
5.2
5.3
5.4
Musical Instrument Digital Interface (MIDI) Port
6.1
6.2
6.3
4.3.4
WATCHDOG TIMER REGISTER BITMAP ............................................................................... 83
OVERVIEW ............................................................................................................................... 84
FUNCTIONAL DESCRIPTION .................................................................................................. 84
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
GAME PORT REGISTERS ....................................................................................................... 87
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
GAME PORT BITMAP ............................................................................................................... 95
OVERVIEW ............................................................................................................................... 96
FUNCTIONAL DESCRIPTION .................................................................................................. 96
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
MIDI PORT REGISTERS ........................................................................................................ 102
6.3.1
6.3.2
6.3.3
6.3.4
WATCHDOG Status Register (WDST) ........................................................................ 83
Game Device Axis Position Indication ......................................................................... 84
Capturing the Position ................................................................................................. 85
Button Status Indication ............................................................................................... 85
Operation Modes ......................................................................................................... 86
Operation Control ........................................................................................................ 87
Game Port Register Map ............................................................................................. 87
Game Port Control Register (GMPCTL) ...................................................................... 88
Game Port Legacy Status Register (GMPLST) ........................................................... 89
Game Port Extended Status Register (GMPXST) ....................................................... 90
Game Port Interrupt Enable Register (GMPIEN) ......................................................... 91
Game Device A X-Axis Position Low Byte (GMPAXL) ................................................ 92
Game Device A X-Axis Position High Byte (GMPAXH) ............................................... 92
Game Device A Y-Axis Position Low Byte (GMPAYL) ................................................ 92
Game Device A Y-Axis Position High Byte (GMPAYH) ............................................... 92
Game Device B X-Axis Position Low Byte (GMPBXL) ................................................ 93
Game Device B X-Axis Position High Byte (GMPBXH) ............................................... 93
Game Device B Y-Axis Position Low Byte (GMPBYL) ................................................ 93
Game Device B Y-Axis Position High Byte (GMPBYH) ............................................... 93
Game Port Event Polarity Register (GMPEPOL) ........................................................ 94
Internal Bus Interface Unit ........................................................................................... 97
Port Control and Status Registers ............................................................................... 97
Data Buffers and FIFOs ............................................................................................... 97
MIDI Communication Engine ....................................................................................... 97
MIDI Signals Routing Control Logic ............................................................................. 98
Operation Modes ......................................................................................................... 98
MIDI Port Status Flags ................................................................................................ 99
MIDI Port Interrupts ................................................................................................... 100
Enhanced MIDI Port Features ................................................................................... 101
MIDI Port Register Map ............................................................................................. 102
MIDI Data In Register (MDI) ...................................................................................... 102
MIDI Data Out Register (MDO) ................................................................................. 102
MIDI Status Register (MSTAT) .................................................................................. 103
(Continued)
8