AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 66

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 7-37.
7.14
32072G–11/2011
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
1. 3.3V domain: V
2. t
3. t
0
1
2
3
4
5
6
7
8
9
10
11
CPMCK
CPMCK
MCI
: Master Clock period in ns.
: Master Clock period in ns.
SPI Timings
Parameter
MISO Setup time before SPCK rises
(master)
MISO Hold time after SPCK rises
(master)
SPCK rising to MOSI Delay
(master)
MISO Setup time before SPCK falls
(master)
MISO Hold time after SPCK falls
(master)
SPCK falling to MOSI Delay
master)
SPCK falling to MISO Delay
(slave)
MOSI Setup time before SPCK rises
(slave)
MOSI Hold time after SPCK rises
(slave)
SPCK rising to MISO Delay
(slave)
MOSI Setup time before SPCK falls
(slave)
MOSI Hold time after SPCK falls
(slave)
VDDIO
The High Speed MultiMedia Card Interface (MCI) supports the MultiMedia Card (MMC) Specifi-
cation V4.2, the SD Memory Card Specification V2.0, the SDIO V1.1 specification and CE-ATA
V1.1.
from 3.0V to 3.6V, maximum external capacitor = 40 pF
Conditions
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
3.3V domain
(1)
(t
(t
CPMCK
CPMCK
Min.
22 +
22 +
1.5
0
0
0
0
1
)/2
)/2
(2)
(3)
Max.
26.5
27
7
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
66