AT32UC3A464S Atmel Corporation, AT32UC3A464S Datasheet - Page 264

• Manufacturer Part Number: AT32UC3A464S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A464S

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• NPARITY1: Parity N
• WORDADDR1: corrupted Word Address in the page between the 256th and the 511th byte
• BITADDR1: corrupted Bit Address in the page between the 256th and the 511th byte
Using ECC-H code, one bit correction per sector of 512 bytes (MD.TYPECORREC=0b010)
• NPARITY1: Parity N
• WORDADDR1: Corrupted Word Address in the page between the 512th and the 1023th byte
• BITADDR1: Corrupted Bit Address in the page between the 512th and the 1023th byte
32072G–11/2011
31
23
15
7
-
Once the entire main area of a page is written with data, this register content must be stored at any free location of the spare
area.
Parity alculated by the ECC-H.
During a page read, this field contains the word address (8-bit word) where an error occurred, if a single error was detected. If
multiple errors were detected, this field is meaningless.
During a page read, this field contains the corrupted bit offset where an error occurred, if a single error was detected. If multiple
errors were detected, this field is meaningless.
Once the entire main area of a page is written with data, this register content must be stored at any free location of the spare
area.
Parity calculated by the ECC-H.
During a page read, this field contains the word address (8-bit word) where an error occurred, if a single error was detected. If
multiple errors were detected, this field is meaningless.
During a page read, this field contains the corrupted bit offset where an error occurred, if a single error was detected. If multiple
errors were detected, this field is meaningless.
30
22
14
6
-
NPARITY1[3:0]
WORDADD1[4:0]
29
21
13
5
-
28
20
12
4
-
NPARITY1[11:4]
27
19
11
3
-
26
18
10
2
WORDADD1[8:5]
-
BITADDR1
25
17
9
1
-
24
16
8
0
-
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