ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 160

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ATxmega128A1

Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.8.1
14.8.2
14.8.3
8077H–AVR–12/09
Waveform Generation
Frequency (FRQ) Waveform Generation
Single Slope PWM Generation
The compare channels can be used for waveform generation on the corresponding port pins. To
make the waveform visible on the connected port pin, the following requirements must be
fulfilled:
Inverted waveform output can be achieved by setting the invert output bit for the port pin.
For frequency generation the period time (T) is controlled by the CCA register instead of PER,
which in this case is not in use. The Waveform Generation (WG) output is toggled on each com-
pare match between the CNT and CCA registers as shown in
Figure 14-12. Frequency Waveform Generation
The waveform generated will have a maximum frequency of half of the Peripheral clock fre-
quency (f
Extension since this only increase the resolution and not the frequency. The waveform fre-
quency (f
where N represents the prescaler divider used (1, 2, 4, 8, 64, 256, 1024, or event channel n).
For single slope PWM generation, the Period (T) is controlled by the PER, while CCx registers
control the duty cycle of the WG output.
TOM to TOP then restarts from BOTTOM. The waveform generator (WG) output is set on the
compare match between the CNT and CCx registers, and cleared at TOP.
f
FRQ
1. A waveform generation mode must be selected.
2. Event actions must be disabled.
3. The CC channels to be used must be enabled. This will override the corresponding port
4. The direction for the associated port pin must be set to output.
CNT
WG Output
=
pin output register.
------------------------------- -
2N CCA+1
FRQ
PER
(
f
PER
MAX
BOT
TOP
)is defined by the following equation:
) when CCA is set to zero (0x0000). This also applies when using the Hi-Res
)
Period (T)
Figure 14-13
Direction Change
shows how the counter counts from BOT-
Figure 14-12 on page
CNT written
XMEGA A
"update"
160.
160

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