ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 85

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8077H–AVR–12/09
• Bit 6:2 - PSADIV[4:0]: Prescaler A Division Factor
These bits define the division ratio of the clock prescaler A according to
can be written run-time to change the clock frequency of the clk
clock, clk
Table 7-2.
• Bit 1:0 - PSBCDIV: Prescaler B and C Division Factor
These bits define the division ratio of the clock prescaler B and C according to
caler B will set the clock frequency for the clk
set the clock frequency for the clk
ure 7-5 on page 80
Table 7-3.
PSBCDIV[1:0]
PSADIV[4:0]
SYS .
00000
00001
00011
00101
00111
01001
01011
01101
01111
10001
10101
10111
11001
11011
11101
11111
00
01
10
11
Prescaler B and C division factor
Prescaler A division factor
fore more details.
Group Configuration
Group Configuration
PER
128
256
512
1_1
1_2
4_1
2_2
16
32
64
1
2
4
8
and clk
CPU
PER2
clocks relative to the clk
Description
No division
Divide by 2
Divide by 4
Divide by 8
Divide by 16
Divide by 32
Divide by 64
Divide by 128
Divide by 256
Divide by 512
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Prescaler B division
No division
No division
Divide by 4
Divide by 2
clock relative to the clk
PER4
clock relative to the System
PER2
Prescaler C division
No division
Divide by 2
No division
Divide by 2
Table
PER4
clock. Refer to
XMEGA A
. Prescaler C will
Table
7-2. These bits
7-3. Pres-
Fig-
85