ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 195

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

17.3.10
17.3.11
8077H–AVR–12/09
COMPH - Real Time Counter Compare Register H
COMPL - Real Time Counter Compare Register L
The COMPH and COMPL register pair represent the 16-bit value COMP. COMP is constantly
compared with the counter value (CNT). A compare match will set the COMPIF in the INT-
FLAGS register. Reading and writing 16-bit values require special attention, refer to
”Configuration Change Protection” on page 12
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application SW needs to
check that the SYNCBUSY flag in the
192
If the COMP value is higher than the PER value, no RTC Compare Match interrupt requests or
events will ever be generated.
• Bits 7:0 - COMP[15:8]: Real Time Counter Compare Register High byte
These bits hold the 8 MSB of the 16-bit RTC compare value.
• Bits 7:0 - COMP[7:0]: Real Time Counter Compare Register Low byte
These bits hold the 8 LSB of the 16-bit RTC compare value.
Bit
+0x0D
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
is cleared before writing to this register.
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
”STATUS - Real Time Counter Status Register” on page
R/W
R/W
4
0
4
0
COMP[15:8]
COMP[7:0]
for details.
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
XMEGA A
R/W
R/W
0
0
0
0
COMPH
COMPL
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