pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 125

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pnx1700

Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Volume 1 of 1
Table 7: TM5250 System Parameters MMIO Registers
7. Video Input and Output Routers
PNX17XX_SER_1
Preliminary data sheet
System Module Registers
Offset 0x06 3700
31:4
3
2
1
0
Offset 0x06 3704
31:1
0
Bit
Symbol
Unused
TM32_APERT_MODIFI
ABLE
TM32_LS_DBLLINE
Unused
TM32_PWRDWN_REQ
Unused
TM32_PWRDWN_ACK
6.3.1 TM5250
TM32_CONTROL
TM32_STATUS
PNX17xx Series provides two groups of high speed pins to stream data or video in
and out. The input group of pins is prefixed by VDI, Video Data Input. The output
group is prefixed by VDO, Video Data Output. Each group is shared between two
modules. On the input side, VIP and FGPI get their pin allocation through the input
router. On the output side QVCP and FGPO get their pin assignment through the
output router. The input router is controlled by VDI_MODE. The output router is
controlled by the VDO_MODE.
Section 7.1
VDI_MODE and VDO_MODE MMIO registers.
page 2-19
Acces
s
-
R/W
R/W
-
R/W
-
R
System Parameters MMIO Registers
give an overview of the different modes.
details the VDI and VDO pin assignment based on the content of the
Value
-
0x1
0x1
-
0x0
-
0x0
Rev. 1 — 17 March 2006
Description
To ensure software backward compatibility, writes to unused or
reserved bits should be zero and reads must be ignored.
TM5250 Aperture Modifiable.
This bit is usually written once at boot time.
The value of this bit can only be altered once.
TM5250 Load/Store Unit (i.e. Data Cache) Double Line Fill enable
To ensure software backward compatibility, writes to unused or
reserved bits should be zero and reads must be ignored.
TM5250 full powerdown request
Upon writes:
Upon reads
To ensure software backward compatibility, writes to unused or
reserved bits should be zero and reads must be ignored.
0: TM5250 is in full power mode.
1: TM5250 is in full powerdown mode.
• 0: Disables writes by the TM5250 to the MMIO registers
• 1: Enables writes by the TM5250 to the MMIO registers
• 0: Do not enable Double Line fills for the Load/Store Unit
• 1: Enable Double Line fills for the Load/Store Unit
• 1->0: Request a TM5250 Power Up
• 0->1: Request a TM5250 Power Down
• Undefined
TM32_DRAM_HI, TM32_DRAM_LO, TM32_APERT_HI and
TM32_APERT_LO.
TM32_DRAM_HI, TM32_DRAM_LO, TM32_APERT_HI and
TM32_APERT_LO.
Chapter 3: System On Chip Resources
Section 9.1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
and
Section 9.2 on
3-16

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