pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 91

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
5. TM5250 VLIW Media Processor Core
PNX17XX_SER_1
Preliminary data sheet
PNX17xx Series provides 5 chip selects for the XIO bus devices. The TM5250 can
execute or read from direct addressable Flash types. Execution from Flash is low
performance, and only recommended for boot usage. After boot, it is recommended
that code files be transferred from Flash to DRAM where they can be executed more
efficiently. Flash cannot be the target of a module DMA write, because write
operations require a software flash programming protocol.
Execution and direct addressed read operations only apply to addressable Flash
types, such as traditional Flash, and not to the “file system like” NAND Flash type.
Peak page mode read performance is 66 MB/s for 16-bit devices and 33 MB/s for 8-
bit devices such as the configurable x8/x16 Intel StrataFlash (28FxxxJ3A, 32Mbits,
64Mbits, 128Mbits) and ST MLC-NOR flash (M58LW064A, 64Mbits). Cross-page
random read accesses each take 4 to 5 PCI clock cycles depending on the access-
time of the device.
Flash is mostly used during system boot or low bandwidth system operation to
provide a small, non-volatile file system.
The TM5250 CPU is a version of the TriMedia 32-bit VLIW media processor. This
Very Long Instruction Word (VLIW) processor operates at up to 500 MHz with 5
instructions per clock cycle, and provides an extensive set of multimedia instructions.
It implements the TriMedia PNX15xx Series instruction set, and has a subset of the
PNX15xx Series functional units to improve higher clock speed rates. And it as a
superset of the multimedia instruction set for better fit with the latests standards for
compressed video streams. It is backwards compatible with PNX1300 Series and
PNX15xx Series CPUs, but has a larger data cache (also referred as D$ or Dcache)
for improved performance. In addition, re-compilation of source code results in higher
media performance due to the additional functional units.
The TM5250 supports 32-bit integer and IEEE compatible 32-bit floating point data
formats. It also provides a Single Instruction Multiple Data (SIMD) style operation set
for operating on dual 16-bit or quad 8-bit packed data.
The TM5250 has sufficient compute performance to deal with a variety of future
operating modes. By itself, the processor can decode any known compressed video
stream and associated audio at full frame rate, such as decoding a DV camcorder
image stream, MPEG-2, MPEG-4 or VC1 decode. The processor is also capable of
doing all audio and video compression, decompression and processing necessary for
bi-directional video conferencing.
The TM5250 is responsible for all media processing and real-time processing
functions within the PNX17xx Series. It runs a small real-time operating system,
pSOS, which allows it to respond efficiently and predictably to real-time events.
The TM5250 is capable of operating in little or big-endian mode. The mode is chosen
shortly after CPU startup by setting the endian bit in the Program Control Status
Word (PCSW).
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 2: Overview
2-10