pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 252

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
Table 9: Registers Description
PNX17XX_SER_1
Preliminary data sheet
Bit
Offset 0x04 0090
31:16
15:8
7:3
2:0
Offset 0x04 0094—07FC Reserved
Offset 0x04 0800
This register will accept only word writes.
31:0
Offset 0x04 0804
This register will accept only word writes.
31:0
Offset 0x04 0808
This register will accept any size writes.
31:16
15:0
Offset 0x04 080C
This register will accept any size writes.
31:11
10
9
8
Symbol
Reserved
dma_threshold
Reserved
dma_fetch
dma_eaddr
dma_iaddr
Reserved
dma_length
Reserved
single_data_phase
snd2xio
fix_addr
DMA DTL tuning
DMA PCI Address
DMA Internal Address
DMA Transfer Size
DMA Controls
Acces
s
R
R/W
R
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
Value
0
0x1B
0
010
1C00_00
00
0010_00
00
0
800
0
0
0
0
Rev. 1 — 17 March 2006
Description
Threshold for when DMA DTL requests more read data when initial
fetch is less than total dma length.
Encoded DMA DTL read block size
siz read_block_siz
000:
001:
010:
011:
100: 128 bytes
101: 256 bytes
110: 512 bytes
111: 1024 bytes
This is the external starting address for the DMA engine. It is used
for DMA transfers over PCI and XIO. Bit 0 and 1 are not used
because all DMA transfers are word aligned.
This is the internal read source/ write destination address in
SDRAM.
This is the length of the DMA transfer (number of 4-byte words).
1 = Limit DMA to single data phase transactions.
0 = Use max_burst_size to determine burst size.
0 = DMA will target PCI.
1 = DMA will target XIO.
0 = DMA will use linear address.
1 = DMA will use a fixed address.
This overrides “max_burst_size.”
16 bytes
32 bytes
64 bytes
8 bytes
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Chapter 7: PCI-XIO Module
PNX17xx Series
7-31