TTSV02622V2-DB AGERE [Agere Systems], TTSV02622V2-DB Datasheet - Page 49

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TTSV02622V2-DB

Manufacturer Part Number
TTSV02622V2-DB
Description
STS-24 Backplane Transceiver
Manufacturer
AGERE [Agere Systems]
Datasheet
June 2003
Agere Systems Inc.
Thermal Characteristics
The TTSV02622 is a 5.86 mm x 6.49 mm die in the 272-pin PBGA (2-layer BGA). For thermal characteristics, the
following values should be used:
Table 11. Thermal Resistance—Junction to Ambient
Power Consumption (Advance)
Table 12. Power Consumption (Advance)
Electrical Characteristics
Table 13. LVTTL Electrical Characteristics
Propagation Delay Specifications
1. Delay in 77.78 MHz system clocks from the Tx line input to the LVDS backplane output is seven clocks (see
2. Propagation delay from a change on the PROT SW pin to a protection switch activity:
3. Propagation delay from A1 STS-1 #1 arriving at LVDS input to RX_TOH_FP is 56 SYS_CLKs, and
4. Delay from CS_N going active (CPU write access to reset the chip) to reset being deactivated and CPU inter-
2 Channel
Output Voltage:
Low
High
NORM to HI-Z:
— Five rising edges of SYS_CLK from assertion of the PROT_SW_A/C pins to the data changing to HI-Z.
NORM to MUX switch:
— Eight rising edges of SYS_CLK from assertion of the PROT_SW_A/C pins to the data changing from stream
Air Speed in Linear Feet per Minute (LFPM)
Figure 15, Transmitter Transport Delay on page 56).
six TOH_CLKs. This will vary by ±14 SYS_CLKs, 12 each way for the FIFO alignment, and ±2 SYS_CLKs due
to the variability in the clock recovery of the CDR macro.
face being ready to handle another access is nine SYS_CLKs.
Jt = 1.00 °C/W
Jc = 15.38 °C/W
Jb = 25.09 °C/W
Ja = 31.92 °C/W
A to B. (See Figure 17 on page 58.)
JEDEC Standard Natural Convection
Parameter
Parameter
200
500
Symbol
V
V
OH
OL
Condition
At 3.465 V
At 3.3 V
Test Conditions
Ja (°C/W)
29.48
28.65
27.42
TTSV02622 STS-24 Backplane Transceiver
Max
1.6
1.7
Min
2.4
Unit
W
W
Max
0.4
Unit
V
V
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