TTSV02622V2-DB AGERE [Agere Systems], TTSV02622V2-DB Datasheet - Page 54

• Manufacturer Part Number: TTSV02622V2-DB
• Description: STS-24 Backplane Transceiver
• Manufacturer: AGERE [Agere Systems]

TTSV02622 STS-24 Backplane Transceiver
Clock and Data Recovery (CDR)
The following specifications are in reference to the clock and data recovery macro that is used for the backplane
interface on the TTSV02622 chip.
Input Data
Jitter Tolerance
Table 19. Jitter Tolerance
Generated Output Jitter
PLL
Input Reference Clock
54
622 Mbits/s scrambled data stream conforms to SONET STS-12 and SDH STM-4 data format using either a PN7
or PN9 sequence. The PN7 characteristic is 1+ x
Longest stream of nontransitional 622 Mbits/s input data is 60 bits. This sequence should not occur more often
than once per minute.
Input signal phase change of no more than 100 ps over 200 ns time interval, which translates to a frequency
change of 500 ppm.
Eye opening greater than 0.4 UIp-p. Unit interval for 622 Mbits/s is 1.6075 ns.
0.2 UIp-p from 250 kHz to 5 MHz as measured on a spectrum analyzer.
Loop bandwidth of less than 6 MHz.
Jitter peaking of less than 2 dB.
Minimum powerup reset duration of 10 µs.
Maximum lock acquisition of less than 1 ms.
External 10 k
Frequency deviation of no more than ± 20 ppm.
Phase change of no more than 100 ps in 200 ns.
Time interval that translates to a frequency change of 500 ppm.
Input reference clock of 77.76 MHz.
Frequency
250 kHz
25 kHz
2 kHz
resistor to ground required.
UIp-p
0.6
6.0
60
6
+ x
7
and The PN9 characteristic is 1+ x
4
+ x
Agere Systems Inc.
9
.
June 2003