CY7C68034-56LTXI Cypress Semiconductor, CY7C68034-56LTXI Datasheet - Page 14

• Manufacturer Part Number: CY7C68034-56LTXI
• Description: USB Interface IC EZ-USB NX2LP-Flex Flash Controller
• Manufacturer: Cypress Semiconductor

Specifications of CY7C68034-56LTXI

• Rohs: yes
• Product: USB 2.0
• Data Rate: 96 Mbps
• Interface Type: I2C
• Operating Supply Voltage: 3.3 V
• Operating Supply Current: 43 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-56
• Minimum Operating Temperature: - 40 C

ECCM = 0
Two 3-byte ECCs, each calculated over a 256-byte block of data.
This configuration conforms to the SmartMedia Standard and is
used by both the NAND boot logic and default NAND firmware
image.
When any value is written to ECCRESET and data is then
passed across the GPIF or slave FIFO interface, the ECC for the
first 256 bytes of data is calculated and stored in ECC1. The ECC
for the next 256 bytes of data is stored in ECC2. After the second
ECC is calculated, the values in the ECCx registers do not
change until ECCRESET is written again, even if more data is
subsequently passed across the interface.
ECCM = 1
One 3-byte ECC calculated over a 512-byte block of data.
When any value is written to ECCRESET and data is then
passed across the GPIF or slave FIFO interface, the ECC for the
first 512 bytes of data is calculated and stored in ECC1; ECC2
is unused. After the ECC is calculated, the value in ECC1 does
not change until ECCRESET is written again, even if more data
is subsequently passed across the interface
Document Number: 001-04247 Rev. *J
Autopointer Access
NX2LP-Flex provides two identical autopointers. They are
similar to the internal 8051 data pointers, but with an additional
feature: they can optionally increment after every memory
access. Also, the autopointers can point to any NX2LP-Flex
register or endpoint buffer space.
I
NX2LP has one I
control external I
mode only. The I
for use after the initial NAND access.
I
The I
resistors even if no EEPROM is connected to the NX2LP.
I
The 8051 can control peripherals connected to the I
the I
control only and is never an I
2
2
2
C Port Pins
C Interface General-Purpose Access
C Controller
2
2
CTL and I
C pins SCL and SDA must have external 2.2-k pull up
2
2
2
C post is disabled at startup and only available
DATA registers. NX2LP provides I
2
C devices. The I
C port that the 8051, once running uses to
CY7C68033/CY7C68034
2
C slave.
2
C port operates in master
Page 14 of 40
2
C bus using
2
C master