STA381BWSTR STMicroelectronics, STA381BWSTR Datasheet - Page 49

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STA381BWSTR

Manufacturer Part Number
STA381BWSTR
Description
Audio DSPs Sound Terminal 2.1 High EFF Dig Audio
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA381BWSTR

Product Category
Audio DSPs
Rohs
yes
Operating Supply Voltage
4.5 V to 25.5 V
Operating Temperature Range
0 C to + 150 C
Mounting Style
SMD/SMT
Package / Case
VQFN-48
Snr
100 dB

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0
STA381BWS
6.9
6.10
POST scaler register (addr 0x08)
Post scaler is set to POST/128 for both CH1 and CH2.
OPER register (addr 0x09)
Table 23.
Table 24.
Reserved
OPER[1:0]
Bit
1
0
D7
D7
1
0
00
11
10
01
R/W
R/W
R/W
OPER register
OPER configuration selection
Reserved
2-channel (full-bridge) power, 2-channel data-out:
1A/1B → 1A/1B
2A/2B → 2A/2B
LineOut1 → 3A/3B
LineOut2 → 4A/4B
Line out configuration determined by LOC register
2-channel (full-bridge) power, 1-channel FFX:
1A/1B → 1A/1B
2A/2B → 2A/2B
3A/3B → 3A/3B
EAPDEXT and TWARNEXT Active
2(half-bridge).1(full-bridge) on-board power:
1A → 1A
2A → 1B
3A/3B → 2A/2B Binary 45°
1A/B → 3A/B
2A/B → 4A/B
1 channel mono-parallel:
3A → 1A/1B
3B → 2A/2B
1A/1B → 3A/3B
2A/2B → 4A/4B
CH3 downmixed on all the PWM channels.
D6
D6
0
0
RST
0
0
Reserved
D5
D5
0
0
Doc ID 018937 Rev 6
w/ C3BO 45°
w/ C3BO 45°
Binary 0°
Binary 90°
Binary 0°
Binary 90°
Output configuration
OPER[1:0]
Name
Reserved
D4
D4
0
0
POST[7:0]
Description
output configuration modes
Reserved
D3
D3
0
0
Register description: New Map
Reserved
D2
D2
0
0
D1
D1
0
0
PBTL enable
OPER[1:0]
Yes
No
No
No
D0
D0
0
0
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