STA381BWSTR STMicroelectronics, STA381BWSTR Datasheet - Page 56

• Manufacturer Part Number: STA381BWSTR
• Description: Audio DSPs Sound Terminal 2.1 High EFF Dig Audio
• Manufacturer: STMicroelectronics

Specifications of STA381BWSTR

• Product Category: Audio DSPs
• Rohs: yes
• Operating Supply Voltage: 4.5 V to 25.5 V
• Operating Temperature Range: 0 C to + 150 C
• Mounting Style: SMD/SMT
• Package / Case: VQFN-48
• Snr: 100 dB

Register description: New Map
56/171
with the original signal. Limiter 1 (DRC1) is then used to control the amplitude of the
left/right high-frequency components, while limiter 2 (DRC2) is used to control the low-
frequency components (see
addr 0x43 -
The cutoff frequency of the high-pass filters can be user-defined, XO[3:0] = 0, or selected
from the pre-defined values.
DRC1 and DRC2 are then used to independently limit L/R high frequencies and LFE
channel amplitude (see
0x43 -
dedicated channel 3 volume control can actually act as a bass boost enhancer as well (0.5
dB/step resolution).
The processed LFE channel is then recombined with the L and R channels in order to
reconstruct the 2.0 output signal.
Sub-band decomposition
The sub-band decomposition for B
The cutoff frequency can be programmed in two ways, using the XO bits in register 0x0C, or
using the “user programmable” mode (coefficients stored in RAM addresses 0x28 to 0x31).
For the user-programmable mode, use the formulas below to compute the high-pass filters:
where alpha = (1-sin(ω
A first-order filter is recommended to guarantee that for every ω
low-pass filter obtained as difference (as shown in
to the HP filter) frequency response, and the corresponding recombination after the DRC
has low ripple. Second-order filters can be used as well, but in this case the filter shape
must be carefully chosen to provide good low-pass response and minimum ripple
recombination. For second-order filters, it is not possible to give a closed formula to get the
best coefficients, but empirical adjustment should be done.
DRC settings
The DRC blocks used by B
control registers (addr 0x23 - 0x26 / addr 0x43 -
DRC blocks in anticlipping mode. Attack and release thresholds can be selected using
registers 0x32, 0x33, 0x34, 0x35, while attack and release rates are configured by registers
0x12 and 0x14.
Band downmixing
The low-frequency band is down-mixed to the left and right channels at the B
Channel volume can be used to weight the bands recombination to fine-tune the overall
frequency response.
0x46)) as well as their volume control. To be noted that, in this configuration, the
b0 = (1 + alpha) / 2
b1 = -(1 + alpha) / 2
b2 = 0
0x46)).
0
))/cos(ω
Section 6.23: Dynamic control registers (addr 0x23 - 0x26 / addr
2
DRC are the same as those described in
Section 6.23: Dynamic control registers (addr 0x23 - 0x26 /
Doc ID 018937 Rev 6
0
), and ω
2
DRC can be configured specifying the cutoff frequency.
0
a0 = 1
a1 = -alpha
a2 = 0
is the cutoff frequency.
0x46). B
Figure
2
24) will have a symmetric (relative
DRC configure automatically the
0
the corresponding
Section 6.23: Dynamic
2
DRC output.
STA381BWS