MA240017 Microchip Technology, MA240017 Datasheet - Page 192

• Manufacturer Part Number: MA240017
• Description: MODULE PLUG-IN PIC24F16KA102 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA240017

• Accessory Type: Plug-In Module (PIM) - PIC24F16KA102
• Product: Microcontroller Modules
• Data Bus Width: 16 bit
• Core Processor: PIC24F16KA102
• Operating Supply Voltage: 3 V to 3.6 V
• Development Tools By Supplier: Integrated Development Environment, Assembler, ANSI C Compiler
• Processor Series: PIC24F
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC24
• Silicon Core Number: PIC24F
• Silicon Family Name: PIC24FxxKAxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Explorer 16 (DM240001 or DM240002)
• For Use With: DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24F16KA102 FAMILY
REGISTER 26-2:
REGISTER 26-3:
DS39927B-page 190
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-3
bit 2-0
R/P-1
IESO
U-0
—
Unimplemented: Read as ‘0’
GSS0: General Segment Code Flash Code Protection bit
1 = No protection
0 = Standard security enabled
GWRP: General Segment Code Flash Write Protection bit
1 = General segment may be written
0 = General segment is write-protected
IESO: Internal External Switchover bit
1 = Internal External Switchover mode enabled (Two-Speed Start-up enabled)
0 = Internal External Switchover mode disabled (Two-Speed Start-up disabled)
Unimplemented: Read as ‘0’
FNOSC<2:0>: Oscillator Selection bits
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator with divide-by-N with PLL module (FRCDIV+PLL)
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator with PLL module (HS+PLL, EC+PLL)
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = 500 kHz Low-Power FRC oscillator with divide-by-N (LPFRCDIV)
111 = 8 MHz FRC oscillator with divide-by-N (FRCDIV)
U-0
U-0
—
—
FGS: GENERAL SEGMENT CONFIGURATION REGISTER
FOSCSEL: OSCILLATOR SELECTION CONFIGURATION REGISTER
C = Clearable bit
‘1’ = Bit is set
P = Programmable bit
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
—
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
FNOSC2
R/P-1
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
FNOSC1
R/C-1
GSS0
R/P-1
FNOSC0
GWRP
R/C-1
R/P-1
bit 0
bit 0