AT91SAM7S32B-MU Atmel, AT91SAM7S32B-MU Datasheet - Page 430

IC MCU ARM7 32KB FLASH 48-VQFN

AT91SAM7S32B-MU

Manufacturer Part Number
AT91SAM7S32B-MU
Description
IC MCU ARM7 32KB FLASH 48-VQFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7S32B-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S32B-MU
Quantity:
2 600
32.8.6
Name:
Access Type:
• DATLEN: Data Length
0 = Forbidden value (1-bit data length not supported).
Any other value: The bit stream contains DATLEN + 1 data bits. Moreover, it defines the transfer size performed by the
PDC2 assigned to the Transmit. If DATLEN is lower or equal to 7, data transfers are bytes, if DATLEN is between 8 and 15
(included), half-words are transferred, and for any other value, 32-bit words are transferred.
• DATDEF: Data Default Value
This bit defines the level driven on the TD pin while out of transmission. Note that if the pin is defined as multi-drive by the
PIO Controller, the pin is enabled only if the SCC TD output is 1.
• MSBF: Most Significant Bit First
0 = The lowest significant bit of the data register is shifted out first in the bit stream.
1 = The most significant bit of the data register is shifted out first in the bit stream.
• DATNB: Data Number per frame
This field defines the number of data words to be transferred after each transfer start, which is equal to (DATNB +1).
• FSLEN: Transmit Frame Sync Length
This field defines the length of the Transmit Frame Sync signal and the number of bits shifted out from the Transmit Sync
Data Register if FSDEN is 1.
This field is used with FSLEN_EXT to determine the pulse length of the Transmit Frame Sync signal.
Pulse length is equal to FSLEN + 1 Transmit Clock periods.
430
FSDEN
MSBF
31
23
15
7
AT91SAM7S Series Preliminary
SSC Transmit Frame Mode Register
30
22
14
SSC_TFMR
Read-write
6
DATDEF
FSOS
29
21
13
5
28
20
12
4
27
19
11
3
DATLEN
26
18
10
2
FSLEN
DATNB
25
17
9
1
6175K–ATARM–30-Aug-10
FSEDGE
24
16
8
0

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