AT91SAM7S32B-MU Atmel, AT91SAM7S32B-MU Datasheet - Page 666

• Manufacturer Part Number: AT91SAM7S32B-MU
• Description: IC MCU ARM7 32KB FLASH 48-VQFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S32B-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

40.11.12 Voltage Regulator
40.11.12.1
40.11.12.2
40.11.13 Watchdog Timer (WDT)
40.11.13.1
40.11.13.2
666
AT91SAM7S Series Preliminary
Voltage Regulator: Current Consumption in Deep Mode
Voltage Regulator: Load Versus Temperature
WDT: The Watchdog Timer May Lock the Device in a Reset State
WDT: The Watchdog Timer Status Register and Interrupt
Add an inverter.
Current consumption in Deep Mode is maximum 60 µA instead of 25 µA.
Due to current rejection from VDDIN to VDDCORE, the current consumption in Deep Mode can-
not be guaranteed. Instead, 60 µA is guaranteed whatever the condition.
None.
Maximum load is 50 mA at 85 °C (instead of 100 mA).
Maximum load is 100 mA at 70°C.
None.
Under certain rare circumstances, if the Watchdog Timer is used with the Watchdog Reset
enabled (WDRSTEN set at 1), the Watchdog Timer may lock the device in a reset state when
the user restarts the watchdog (WDDRSTT). The only way to recover from this state is a power-
on reset. The issue depends on the values of WDD and WDV in the WDT_MR register.
Two workarounds are possible.
Under certain rare circumstances, if the Watchdog Timer is used with the Watchdog Fault Inter-
rupt enabled (WDFIEN set at 1), the Watchdog Timer may trigger the interrupt (wdt_fault)
erroneously. The Watchdog Timer Status Register may be wrong also (WDERR and WDUNF).
The issue depends on the values of WDD and WDV in the WDT_MR register.
Two workarounds are possible.
1. Either do not use the Watchdog Timer with the Watchdog Reset enabled (WDRSTEN
2. or set WDD to 0xFFF and in addition use only one of the following values for WDV:
1. Either do not use the Watchdog Timer with the Watchdog fault Interrupt enabled
2. or set WDD to 0xFFF and in addition use only one of the following values for WDV:
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
set at 1),
0xFFF, 0xDFF, 0xBFF, 0x9FF, 0x7FF, 0x77F, 0x6FF, 0x67F, 0x5FF, 0x57F, 0x4FF,
0x47F, 0x3FF, 0x37F, 0x2FF, 0x27F, 0x1FF, 0x1BF, 0x17F, 0x13F, 0x0FF, 0x0DF, 0x0BF,
0x09F, 0x07F, 0x06F, 0x05F, 0x04F, 0x03F, 0x037, 0x02f, 0x027, 0x01F, 0x01B, 0x017,
0x013 and 0x00F.
(WDFIEN set at 1),
0xFFF, 0xDFF, 0xBFF, 0x9FF, 0x7FF, 0x77F, 0x6FF, 0x67F, 0x5FF, 0x57F, 0x4FF,
6175K–ATARM–30-Aug-10