AT91SAM7S32B-MU Atmel, AT91SAM7S32B-MU Datasheet - Page 765

IC MCU ARM7 32KB FLASH 48-VQFN

AT91SAM7S32B-MU

Manufacturer Part Number
AT91SAM7S32B-MU
Description
IC MCU ARM7 32KB FLASH 48-VQFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7S32B-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S32B-MU
Quantity:
2 600
6175K–ATARM–30-Aug-10
Version
6175F
Comments (Continued)
USART, Section 30.6.7 ”AT91SAM7S512/256/128/64/321 Modem Mode”change to: The control of DTR
output.... RTS output pin.....
Section 30.6.4.1 ”ISO7816 Mode Overview”PAR bit usage
Section 30.6.3 ”Synchronous and Asynchronous Modes” Manchester Encoder/Decoder feature removed
Section 30.5.1 ”I/O Lines”TXD line information added
Section 30.6.1.3 ”AT91SAM7S512/256/128 Fractional Baud Rate in Asynchronous Mode”USART
“functional mode” changed to “normal mode”
Table 30-3 and Table 30-4 on page 312 Di and Fi references corrected in titles.
Figure 30-27 ”IrDA Demodulator Operations” page 328, Figure modified.
Table 30-2, “Baud Rate Example (OVER = 0)last two lines of table removed.
Section 30.6.3.2 ”Asynchronous Receiver” change to second sentence in fourth paragraph, “For the
synchronization mechanism.....”
Section 30.6.3.8 ”Receiver Time-out” list of user options rewritten.
Section 30.7.1 ”USART Control Register” STTTO bit function related to TIMEOUT in US_CSR register.
Section 30.7.6 ”USART Channel Status Register” TIMEOUT bit function related to STTTO in US_CR
register.
WDT, WV changed to WDV in Section 17.2 ”Block Diagram” and in Section 17.3 ”Functional Description”
and 6th and 7th paragraph rewritten on page 112 beginning with “To prevent a software deadlock....”
Section 37. ”AT91SAM7S Electrical Characteristics”
the following tables.
Table 37-2, “DC Characteristics”
Table 37-5, “DC Flash Characteristics AT91SAM7S64/321/32/161/16”
Table 37-6, “DC Flash Characteristics AT91SAM7S512/256/128”
Table 37-7, “Power Consumption for Different Modes”
Table 37-8, “Power Consumption on VDDCORE
Table 37-10, “Main Oscillator Characteristics”
Table 37-11, “Crystal Characteristics”
Table 37-12, “XIN Clock Electrical Characteristics”
Table 37-13, “Phase Lock Loop Characteristics”
Table 37-22, “SPI Timings”
Section 37. ”AT91SAM7S Electrical Characteristics”
“Absolute Maximum Ratings” on page
Table 37-7, “Power Consumption for Different
Section 38. ”Mechanical Characteristics”
has been added.
553, change to Maximum Operating Voltages.
SAM7S512 added to Device and Package weights
Modes”, note added to table
(1)
AT91SAM7S512 specific info added and changes to
AT91SAM7S Series Preliminary
Change
Request
Ref.
#1770
#1552
#2748
#2794 &
rfo review
#2942
#3023
#3002
Review
#3058
#3061
755

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