PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 110

• Manufacturer Part Number: PIC32MX440F512H-80I/MR
• Description: IC PIC MCU FLASH 512KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX3XX/4XX
26.2
This section describes the operation of the WDT and
Power-Up Timer of the PIC32MX3XX/4XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
FIGURE 26-1:
26.3
All PIC32MX3XX/4XX device’s core and digital logic
are designed to operate at a nominal 1.8V. To simplify
system
PIC32MX3XX/4XX incorporate an on-chip regulator
providing the required core logic voltage from V
The internal 1.8V regulator is controlled by the
ENVREG pin. Tying this pin to V
lator, which in turn provides power to the core. A low
ESR capacitor (such as tantalum) must be connected
to the V
maintain the stability of the regulator. The recom-
mended value for the filer capacitor is provided in
Section 28.1 “DC Characteristics” .
DS61143F-page 108
Note:
WDTCLR =
WDT Enable
DDCORE
Watchdog Timer (WDT)
On-Chip Voltage Regulator
PWRT Enable
designs,
Oscillator
It is important that the low ESR capacitor
is placed as close as possible to the
V
WDT Enable
LPRC
DDCORE
Wake
/V
1
CAP
/V
WATCHDOG AND POWER-UP TIMER BLOCK DIAGRAM
pin (Figure 26-2). This helps to
CAP
most
pin.
DD
devices
enables the regu-
WDT Counter Reset
in
DD
Clock
.
Preliminary
the
25-bit Counter
FWDTPS<4:0>(DEVCFG1<20:16>)
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
Tying the ENVREG pin to V
this case, separate power for the core logic at a nomi-
nal 1.8V must be supplied to the device on the
V
Alternately, the V
tied together to operate at a lower nominal voltage.
Refer to Figure 26-2 for possible configurations.
26.3.1
When the voltage regulator is enabled, it takes fixed
delay for it to generate output. During this time, desig-
nated as T
every time the device resumes operation after any
power-down, including Sleep mode.
If the regulator is disabled, a separate Power-Up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of T
Section 28.0 “Electrical Characteristics” for more
information on T
1:64 Output
DDCORE
25
1
/V
PU
CAP
Decoder
ON-CHIP REGULATOR AND POR
, code execution is disabled. T
pin.
PU AND
PWRT Enable
DDCORE
PWRT
Power Save
T
© 2009 Microchip Technology Inc.
PWRT
/V
0
1
SS
at device start-up. See
CAP
disables the regulator. In
.
and V
Control
PWRT
Device Reset
NMI (Wake-up)
LPRC
DD
pins can be
PU
is applied