PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 46

• Manufacturer Part Number: PIC32MX440F512H-80I/MR
• Description: IC PIC MCU FLASH 512KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-12:
BF88_32C0 DCH3INT
BF88_32D0 DCH3SSA
Legend:
Note
BF88_3280 DCH2CPTR
BF88_3290 DCH2DAT
BF88_32A0 DCH3CON
BF88_32B0 DCH3ECON
BF88_32E0 DCH3DSA
BF88_32F0 DCH3SSIZ
BF88_3300 DCH3DSIZ
BF88_3310 DCH3SPTR
BF88_3320 DCH3DPTR
BF88_3330 DCH3CSIZ
BF88_3340 DCH3CPTR
BF88_3350 DCH3DAT
Virtual
Addr
SFR
1:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers except DCHxSPTR, DCHxDPTR, and DCHxCPTR have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR,
SET and INV Registers” for more information.
Name
SFR
DMA CHANNELS 0-3 REGISTERS MAP (CONTINUED)FOR PIC32MX340FXXXX/360FXXXX/440FXXXX/460XXXX DEVICES
ONLY
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
(1)
31/15
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(CONTINUED)
30/14
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
29/13
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
28/12
Bits
—
—
—
—
—
—
—
CHSIRQ<7:0>
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
27/11
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/9
Bits
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CHCHNS
Bits
24/8
CHSSA<31:0>
CHDSA<31:0>
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CFORCE
CHSDIE
CHSDIF
CHEN
Bits
23/7
—
—
—
—
—
—
—
—
—
—
CABORT
CHSHIE
CHSHIF
CHAED
Bits
22/6
—
—
—
—
—
—
—
—
—
—
CHDDIE
CHCHN
CHDDIF
PATEN
Bits
21/5
—
—
—
—
—
—
—
—
—
—
SIRQEN
CHDHIE
CHDHIF
CHAEN
20/4
Bits
CHCPTR<7:0>
CHPDAT<7:0>
CHDPTR<7:0>
CHCPTR<7:0>
CHPDAT<7:0>
—
—
—
CHAIRQ<7:0>
—
—
—
—
—
—
—
CHSSIZ<7:0>
CHDSIZ<7:0>
CHCSIZ<7:0>
CHSTR<7:0>
AIRQEN
CHBCIE
CHBCIF
19/3
Bits
—
—
—
—
—
—
—
—
—
—
—
CHEDET
CHCCIE
CHCCIF
18/2
Bits
—
—
—
—
—
—
—
—
—
—
—
CHTAIE
CHTAIF
Bits
17/1
—
—
—
—
—
—
—
—
—
—
—
CHPRI<1:0>
CHERIE
CHERIF
Bits
16/0
—
—
—
—
—
—
—
—
—
—
—