PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 83

IC PIC MCU FLASH 512KX32 64-QFN

PIC32MX440F512H-80I/MR

Manufacturer Part Number
PIC32MX440F512H-80I/MR
Description
IC PIC MCU FLASH 512KX32 64-QFN
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, JTAG, SPI, TWI, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
17.0
The SPI module is a synchronous serial interface use-
ful for communicating with external peripherals and
other
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The PIC32MX SPI
module is compatible with Motorola
interfaces.
FIGURE 17-1:
© 2009 Microchip Technology Inc.
Note:
Note: Access SPIxTXB and SPIxRXB registers via SPIxBUF register.
microcontroller
SERIAL PERIPHERAL
INTERFACE (SPI)
SSx/F
reference source. Refer to the “PIC32MX
web site (www.Microchip.com/PIC32).
This data sheet summarizes the features of
the PIC32MX3XX/4XX family of devices. It
is not intended to be a comprehensive
Family Reference Manual” Section 23.
“Serial
(DS61106) for a detailed description of this
peripheral.
The manual is available from the Microchip
SDOx
SCKx
SDIx
SYNC
Peripheral
SPI MODULE BLOCK DIAGRAM
devices.
Receive
Slave Select
Sync Control
and Frame
SPIxRXB
Read
Interface
These
bit 0
®
SPI and SIOP
SPIxBUF
SPIxSR
peripheral
(SPI)”
Control
Clock
Preliminary
Shift
Control
SPIxTXB
Write
Transmit
Data Bus
Following are some of the key features of this module:
• Master and Slave Modes Support
• Four Different Clock Formats
• Framed SPI Protocol Support
• User Configurable 8-bit, 16-bit and 32-bit Data
• Separate SPI Data Registers for Receive and
• Programmable Interrupt Event on every 8-bit,
• Operation during CPU Sleep and Idle Mode
• Fast Bit Manipulation using CLR, SET and INV
Internal
Select
Edge
Width
Transmit
16-bit and 32-bit Data Transfer
Registers
PIC32MX3XX/4XX
Enable Master Clock
Baud Rate
Generator
Registers share address SPIxBUF
PBCLK
DS61143F-page 81

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