LPC1342FHN33,551 NXP Semiconductors, LPC1342FHN33,551 Datasheet - Page 111

• Manufacturer Part Number: LPC1342FHN33,551
• Description: IC MCU 32BIT 16KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1342FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4946; 935289656551

NXP Semiconductors
Table 136. LPC1313/43 LQFP48 pin description table
UM10375
User manual
Symbol
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
PIO0_2/SSEL/
CT16B0_CAP0
PIO0_3/USB_VBUS
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/USB_CONNECT/
SCK
PIO0_7/CTS
PIO0_8/MISO/
CT16B0_MAT0
PIO0_9/MOSI/
CT16B0_MAT1/
SWO
SWCLK/PIO0_10/
SCK/CT16B0_MAT2
7.4.1 LQFP48 packages
Pin
3
4
10
14
15
16
22
23
27
28
29
[1]
[2]
[2]
[2]
[3]
[3]
[2]
[2]
[2]
[2]
[2]
Type
I
I/O
I/O
O
O
O
I/O
O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
I
I/O
I/O
O
I/O
I/O
O
O
I
I/O
O
O
All information provided in this document is subject to legal disclaimers.
Description
RESET — External reset input: A LOW on this pin resets the device,
causing I/O ports and peripherals to take on their default states, and
processor execution to begin at address 0.
PIO0_0 — General purpose digital input/output pin.
PIO0_1 — General purpose digital input/output pin. A LOW level on this pin
during reset starts the ISP command handler or the USB device
enumeration (USB on LPC1343 only, see description of PIO0_3).
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
USB_FTOGGLE — USB 1 ms Start-of-Frame signal (LPC1343 only).
PIO0_2 — General purpose digital input/output pin.
SSEL — Slave select for SSP.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin. LPC1343 only: A LOW
level on this pin during reset starts the ISP command handler, a HIGH level
starts the USB device enumeration.
USB_VBUS — Monitors the presence of USB bus power (LPC1343 only).
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I
Fast-mode Plus is selected in the I/O configuration register.
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I
Fast-mode Plus is selected in the I/O configuration register.
PIO0_6 — General purpose digital input/output pin.
USB_CONNECT — Signal used to switch an external 1.5 kΩ resistor under
software control. Used with the SoftConnect USB feature (LPC1343 only).
SCK — Serial clock for SSP.
PIO0_7 — General purpose digital input/output pin (high-current output
driver).
CTS — Clear To Send input for UART.
PIO0_8 — General purpose digital input/output pin.
MISO — Master In Slave Out for SSP.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9 — General purpose digital input/output pin.
MOSI — Master Out Slave In for SSP.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWO — Serial wire trace output.
SWCLK — Serial wire clock.
PIO0_10 — General purpose digital input/output pin.
SCK — Serial clock for SSP.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
Rev. 2 — 7 July 2010
2
2
C-bus clock input/output (open-drain). High-current sink only if I
C-bus data input/output (open-drain). High-current sink only if I
Chapter 7: LPC13xx Pin configuration
UM10375
© NXP B.V. 2010. All rights reserved.
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C
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