LPC1342FHN33,551 NXP Semiconductors, LPC1342FHN33,551 Datasheet - Page 12

• Manufacturer Part Number: LPC1342FHN33,551
• Description: IC MCU 32BIT 16KB FLASH 33HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1342FHN33,551

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 33HVQFN EP
• Device Core: ARM Cortex M3
• Family Name: LPC1000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4946; 935289656551

NXP Semiconductors
3.5 Register description
UM10375
User manual
Fig 3.
wdt_osc_clk
sys_osc_clk
sys_osc_clk
irc_osc_clk
irc_osc_clk
USB is available in parts LPC134x only.
LPC13xx CGU block diagram
SYSPLLCLKSEL
USBPLLCLKSEL
sys_pllclkin
usb_pllclkin
All registers, regardless of size, are on word address boundaries. Details of the registers
appear in the description of each function.
See
the system setup. This register is not part of the system configuration block.
Section 3.11
MAINCLKSEL
sys_pllclkout
USB PLL
SYS PLL
All information provided in this document is subject to legal disclaimers.
for the flash access timing register, which can be re-configured as part
usb_pllclkout
main clock
Rev. 2 — 7 July 2010
wdt_osc_clk
wdt_osc_clk
sys_osc_clk
irc_osc_clk
irc_osc_clk
DIVIDER
CLOCK
CLKOUTUEN
WDTUEN
USBUEN
Chapter 3: LPC13xx System configuration
system clock
AHBCLKCTRL
(IOCON enable)
AHBCLKCTRL
(ROM enable)
DIVIDER
DIVIDER
DIVIDER
DIVIDER
CLOCK
CLOCK
CLOCK
CLOCK
DIVIDER
DIVIDER
DIVIDER
CLOCK
CLOCK
CLOCK
UM10375
sys_ahb_clk[0]
(system)
sys_ahb_clk[1]
(ROM)
sys_ahb_clk[16]
(IOCON)
© NXP B.V. 2010. All rights reserved.
SSP_PCLK
UART_PCLK
ARM trace clock
SYSTICK
timer
wdt_clk
usb_clk
clkout_clk
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