LPC1342FHN33,551 NXP Semiconductors, LPC1342FHN33,551 Datasheet - Page 175
LPC1342FHN33,551
Manufacturer Part Number
LPC1342FHN33,551
Description
IC MCU 32BIT 16KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Specifications of LPC1342FHN33,551
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
4 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
33HVQFN EP
Device Core
ARM Cortex M3
Family Name
LPC1000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4946
935289656551
935289656551
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UM10375
User manual
Fig 16. Auto-RTS Functional Timing
UART Rx
UART Rx
UART Rx
FIFO read
FIFO level
RTS pin
11.6.8.1.2 Auto-CTS
start
N-1
byte N
The Auto-CTS function is enabled by setting the CTSen bit. If Auto-CTS is enabled, the
transmitter circuitry in the U0TSR module checks CTS input before sending the next data
byte. When CTS is active (low), the transmitter sends the next byte. To stop the
transmitter from sending the following byte, CTS must be released before the middle of
the last stop bit that is currently being sent. In Auto-CTS mode, a change of the CTS
signal does not trigger a modem status interrupt unless the CTS Interrupt Enable bit is set,
Delta CTS bit in the U0MSR will be set though.
generating a Modem Status interrupt.
Table 197. Modem status interrupt generation
The auto-CTS function reduces interrupts to the host system. When flow control is
enabled, a CTS state change does not trigger host interrupts because the device
automatically controls its own transmitter. Without Auto-CTS, the transmitter sends any
data present in the transmit FIFO and a receiver overrun error can result.
illustrates the Auto-CTS functional timing.
Enable
modem
status
interrupt
(U0ER[3])
0
1
1
1
1
1
1
1
1
stop
start
N
CTSen
(U0MCR[7])
x
0
0
0
1
1
1
1
1
All information provided in this document is subject to legal disclaimers.
bits0..7
N-1
Rev. 2 — 7 July 2010
CTS
interrupt
enable
(U0IER[7])
x
x
x
x
0
0
1
1
1
stop
N-2
N-1
Delta CTS
(U0MSR[0])
x
0
1
x
x
x
0
1
x
N-2
Table 197
Delta DCD or trailing edge
RI or
Delta DSR (U0MSR[3] or
U0MSR[2] or U0MSR[1])
x
0
x
1
0
1
0
x
1
M+2
lists the conditions for
M+1
Chapter 11: LPC13xx UART
M
start
UM10375
© NXP B.V. 2010. All rights reserved.
Figure 17
bits0..7
M-1
Modem
status
interrupt
No
No
Yes
Yes
No
Yes
No
Yes
Yes
177 of 333
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