P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 126

• Manufacturer Part Number: P87C591VFA/00,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C591VFA/00,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: CAN, EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN, I2C, UART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1256-5; 935268182512; P87C591VFAA

Philips Semiconductors
otherwise the bit being tested is cleared. This process is
repeated until all ten bits have been tested, at which stage
the result of the conversion is held in the successive
approximation register. Figure 48 shows a conversion flow
chart. The bit pointer identifies the bit under test. The
conversion takes four machine cycles per bit.
The end of the 10-bit conversion is flagged by control bit
ADCON.4 (ADCI). The upper 8 bits of the result are held in
Special Function Register ADCH, and the two remaining
bits are held in ADCON.7 (ADC.1) and ADCON.6 (ADC.0).
The user may ignore the two least significant bits in
ADCON and use the ADC as an 8-bit converter (8 upper
bits in ADCH). In any event, the total actual conversion
2000 Jul 26
handbook, full pagewidth
Single-chip 8-bit microcontroller with CAN controller
full scale
V DAC
V DAC
V in
V in
1
0
1/2
Fig.49 Successive Approximation ADC.
1
DAC
3/4
2
APPROXIMATION
SUCCESSIVE
7/8
REGISTER
START
3
126
15/16
time is 50 machine cycles for the P8xC591. ADCI will be
set and the ADCS status flag will be reset 50 (or 24) cycles
after the command flip-flop (ADCS) is set.
Control bits ADCON.0, ADCON.1, and ADCON.2 are used
to control an analog multiplexer which selects one of six
analog channels (see Section 20.3.1). An ADC conversion
in progress is unaffected by a new software ADC start. The
result of a completed conversion remains unaffected
provided ADCI = logic 1; a new ADC conversion already in
progress is aborted when the Idle or Power-down mode is
entered. The result of a completed conversion (ADCI =
logic 1) remains unaffected when entering the Idle mode.
4
29/32
APPROXIMATION
CONTROL LOGIC
SUCCESSIVE
STOP
5
59/64
t/tau
6
MHI051
Preliminary Specification
P8xC591