P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 79

• Manufacturer Part Number: P87C591VFA/00,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C591VFA/00,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: CAN, EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN, I2C, UART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1256-5; 935268182512; P87C591VFAA

Philips Semiconductors
15.2.6
This programmable clock pulse generator provides the
SCL clock pulses when SIO1 is in the master transmitter
or master receiver mode. It is switched off when SIO1 is in
a slave mode. The programmable output clock
frequencies are: f
overflow rate divided by eight. The output clock pulses
have a 50% duty cycle unless the clock generator is
synchronized with other SCL clock sources as described
above.
15.2.7
The timing and control logic generates the timing and
control signals for serial byte handling. This logic block
provides the shift pulses for S1DAT, enables the
comparator, generates and detects start and stop
conditions, receives and transmits acknowledge bits,
controls the master and slave modes, contains interrupt
request logic, and monitors the I
15.2.8
This 7-bit special function register is used by the
microcontroller to control the following SIO1 functions:
start and restart of a serial transfer, termination of a serial
transfer, bit rate, address recognition, and
acknowledgment.
2000 Jul 26
handbook, full pagewidth
Single-chip 8-bit microcontroller with CAN controller
S
T
C
IMING AND
ERIAL
ONTROL
C
CLK
SDA
SCL
LOCK
(1) Another service pulls the SCL line low before the SIO “mask” duration is complete. The serial clock generator
(2) Another device still pulls the SCL line low after SIO1 releases SCL. The serial clock generator is forced into
(3) The SCL line is released, and the serial clock generator commences with the mark duration.
R
EGISTER
/120, f
C
is immediately reset and commences with the “space” duration by pulling SCL low.
the wait state until the SCL line is released.
ONTROL
G
ENERATOR
CLK
, S1CON
/9600, and the Timer 1
2
C bus status.
duration
mark
Fig.34 Serial Clock Synchronization.
(1)
space duration
79
15.2.9
The status decoder takes all of the internal status bits and
compresses them into a 5-bit code. This code is unique for
each I
generate vector addresses for fast processing of the
various service routines. Each service routine processes a
particular bus status. There are 26 possible bus states if all
four modes of SIO1 are used. The 5-bit status code is
latched into the five most significant bits of the status
register when the serial interrupt flag is set (by hardware)
and remains stable until the interrupt flag is cleared by
software. The three least significant bits of the status
register are always zero. If the status code is used as a
vector to service routines, then the routines are displaced
by eight address locations. Eight bytes of code is sufficient
for most of the service routines (see the software example
in this section).
15.2.10 T
The microcontroller interfaces to SIO1 via four special
function registers. These four SFRs (S1ADR, S1DAT,
S1CON, and S1STA) are described individually in the
following sections.
2
(2)
C bus status. The 5-bit code may be used to
S
HE
TATUS
(3)
F
OUR
D
ECODER AND
SIO1 S
(1)
PECIAL
S
MHI035
TATUS
Preliminary Specification
F
UNCTION
R
EGISTER
P8xC591
R
EGISTERS