MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 154
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MC9S08JM60CGT
Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08JM32CLD.pdf
(388 pages)
Specifications of MC9S08JM60CGT
Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Analog-to-Digital Converter (S08ADC12V1)
10.4.7
Stop mode is a low power-consumption standby mode during which most or all clock sources on the MCU
are disabled.
10.4.7.1
If the asynchronous clock, ADACK, is not selected as the conversion clock, executing a stop instruction
aborts the current conversion and places the ADC in its idle state. The contents of ADCRH and ADCRL
are unaffected by stop3 mode. After exiting from stop3 mode, a software or hardware trigger is required
to resume conversions.
10.4.7.2
If ADACK is selected as the conversion clock, the ADC continues operation during stop3 mode. For
guaranteed ADC operation, the MCU’s voltage regulator must remain active during stop3 mode. Consult
the module introduction for configuration information for this MCU.
If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions
can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous
conversions are enabled.
A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from stop3
mode if the ADC interrupt is enabled (AIEN = 1).
10.4.8
The ADC module is automatically disabled when the MCU enters stop2 mode. All module registers
contain their reset values following exit from stop2. Therefore, the module must be re-enabled and
re-configured following exit from stop2.
10.5
This section gives an example that provides some basic direction on how to initialize and configure the
ADC module. You can configure the module for 8-, 10-, or 12-bit resolution, single or continuous
conversion, and a polled or interrupt approach, among many other options. Refer to
Table
154
10-8, and
Initialization Information
MCU Stop3 Mode Operation
MCU Stop2 Mode Operation
Stop3 Mode With ADACK Disabled
Stop3 Mode With ADACK Enabled
The ADC module can wake the system from low-power stop and cause the
MCU to begin consuming run-level currents without generating a system
level interrupt. To prevent this scenario, software should ensure the data
transfer blocking mechanism (discussed in
Conversions,”) is cleared when entering stop3 and continuing ADC
conversions.
Table 10-9
for information used in this example.
MC9S08JM60 Series Data Sheet, Rev. 3
NOTE
Section 10.4.4.2, “Completing
Freescale Semiconductor
Table
10-7,
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