MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 69
![IC MCU 8BIT 60K FLASH 48-QFN](/photos/12/17/121757/mc9s08jm60cgt_sml.jpg)
MC9S08JM60CGT
Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08JM32CLD.pdf
(388 pages)
Specifications of MC9S08JM60CGT
Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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The IRQ pin, when enabled, defaults to use an internal pull device (IRQPDD = 0), the device is a pullup
or pull-down depending on the polarity chosen. If the user desires to use an external pullup or pull-down,
the IRQPDD can be written to a 1 to turn off the internal device.
BIH and BIL instructions may be used to detect the level on the IRQ pin when the pin is configured to act
as the IRQ input.
5.5.2.2
The IRQMOD control bit re-configure the detection logic so it detects edge events and pin levels. In this
edge detection mode, the IRQF status flag becomes set when an edge is detected (when the IRQ pin
changes from the deasserted to the asserted level), but the flag is continuously set (and cannot be cleared)
as long as the IRQ pin remains at the asserted level.
5.5.3
Table 5-1
bottom of the table. The high-order byte of the address for the interrupt service routine is located at the
first address in the vector address column, and the low-order byte of the address for the interrupt service
routine is located at the next higher address.
When an interrupt condition occurs, an associated flag bit becomes set. If the associated local interrupt
enable is 1, an interrupt request is sent to the CPU. Within the CPU, if the global interrupt mask (I bit in
the CCR) is 0, the CPU will finish the current instruction, stack the PCL, PCH, X, A, and CCR CPU
registers, set the I bit, and then fetch the interrupt vector for the highest priority pending interrupt.
Processing then continues in the interrupt service routine.
Freescale Semiconductor
Number
31 to 30
Vector
29
28
27
26
25
24
provides a summary of all interrupt sources. Higher-priority sources are located toward the
Interrupt Vectors, Sources, and Local Masks
Edge and Level Sensitivity
0xFFCC:FFCD
0xFFCA:FFCB
0xFFCE:FFCF
0xFFC0:FFC1
0xFFC2:FFC3
0xFFC4:FFC5
0xFFC6:FFC7
0xFFC8:FFC9
This pin does not contain a clamp diode to V
above V
be as low as V
all the way to V
(High/Low)
Address
Table 5-1. Vector Summary (from Lowest to Highest Priority)
DD
. The voltage measured on the internally pulled up IRQ pin may
DD
Vector Name
Vkeyboard
DD
Vsci2tx
Vacmp
– 0.7 V. The internal gates connected to this pin are pulled
Vadc
Vrtc
Viic
.
MC9S08JM60 Series Data Sheet, Rev. 3
Module
System
control
ACMP
Unused vector space (available for user program)
SCI2
ADC
KBI
IIC
NOTE
Source
COCO
TDRE
RTIF
IICIF
ACF
KBF
TC
DD
Chapter 5 Resets, Interrupts, and System Configuration
and must not be driven
Enable
AIEN
RTIE
IICIE
ACIE
KBIE
TCIE
TIE
RTC real-time interrupt
Keyboard pins
SCI2 transmit
Description
ACMP
ADC
IIC
69
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