MC9S08JM60CGT Freescale Semiconductor, MC9S08JM60CGT Datasheet - Page 304

IC MCU 8BIT 60K FLASH 48-QFN

MC9S08JM60CGT

Manufacturer Part Number
MC9S08JM60CGT
Description
IC MCU 8BIT 60K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM60CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
37
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
24MHz
Total Internal Ram Size
4KB
# I/os (max)
37
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Package
48QFN EP
Family Name
HCS08
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
For Use With
DEMOJM - KIT DEMO FOR JM MCU FAMILYDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
Part Number:
MC9S08JM60CGT
Manufacturer:
FREESCALE
Quantity:
5 200
Universal Serial Bus Device Controller (S08USBV1)
17.3.6
The INTENB contains enabling bits for each of the interrupt sources within the USB module. Setting any of these
bits will enable the respective interrupt source in the INTSTAT register. This register will contain the value of 0x00
after a reset, i.e. all interrupts disabled.
304
USBRSTF
ERRORF
RESUME
TOKDNE
SOFTOK
SLEEP
Reset
STALL
Field
Field
1
0
7
5
4
3
2
W
R
STALL
Interrupt Enable Register (INTENB)
Error Flag — This bit is set when any of the error conditions within the ERRSTAT register has occurred. The
firmware must then read the ERRSTAT register to determine the source of the error.
0 No error conditions within the ERRSTAT register have been detected
1 Error conditions within the ERRSTAT register have been detected
USB Reset Flag —This bit is set when the USB module has decoded a valid USB reset. When asserted, this bit
will inform the MCU to automatically write 0x00 to the address register and to enable endpoint 0. USBRSTF is
set once a USB reset has been detected for 2.5 μs. It will not be asserted again until the USB reset condition has
been removed, and then reasserted.
0 No USB reset observed
1 USB reset detected
STALL Interrupt Enable — Setting this bit will enable STALL interrupts.
0 Interrupt disabled
1 Interrupt enabled
RESUME Interrupt Enable — Setting this bit will enable RESUME interrupts.
0 Interrupt disabled
1 Interrupt enabled
SLEEP Interrupt Enable — Setting this bit will enable SLEEP interrupts.
0 Interrupt disabled
1 Interrupt enabled
TOKDNE Interrupt Enable — Setting this bit will enable TOKDNE interrupts.
0 Interrupt disabled
1 Interrupt enabled
SOFTOK Interrupt Enable — Setting this bit will enable SOFTOK interrupts.
0 Interrupt disabled
1 Interrupt enabled
0
7
0
0
6
Table 17-9. INTSTAT Field Descriptions (continued)
Figure 17-9. Interrupt Enable Register (INTENB)
Table 17-10. INTENB Field Descriptions
RESUME
MC9S08JM60 Series Data Sheet, Rev. 3
0
5
SLEEP
0
4
Description
Description
TOKDNE
3
0
SOFTOK
0
2
ERROR
Freescale Semiconductor
0
1
USBRST
0
0

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