MC9S08DZ60ACLF Freescale Semiconductor, MC9S08DZ60ACLF Datasheet - Page 400

• Manufacturer Part Number: MC9S08DZ60ACLF
• Description: IC MCU 60K FLASH 4K RAM 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DZ60ACLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: S08DZ
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• For Use With: DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 18 Debug Module (S08DBGV3) (128K)
18.3.3.6
1
18.3.3.7
1
400
end-run
end-run
Module Base + 0x0005
Module Base + 0x0006
end-run
end-run
or non-
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the bits in this register do not change after reset.
or non-
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the bits in this register do not change after reset.
Bits 7–0
Reset
Reset
Field
POR
POR
W
W
R
R
1
1
Bit 15
Bit 7
Comparator C Low Compare Bits — The Comparator C Low compare bits control whether Comparator C will
compare the address bus bits [7:0] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
Debug Comparator C Low Register (DBGCCL)
Debug FIFO High Register (DBGFH)
U
U
0
0
7
7
= Unimplemented or Reserved
Figure 18-7. Debug Comparator C Low Register (DBGCCL)
Bit 14
Bit 6
U
U
0
0
6
6
Figure 18-8. Debug FIFO High Register (DBGFH)
Table 18-8. DBGCCL Field Descriptions
MC9S08DZ128 Series Data Sheet, Rev. 1
Bit 13
Bit 5
U
U
0
0
5
5
Bit 12
Bit 4
U
U
0
0
4
4
Description
Bit 11
Bit 3
U
U
0
0
3
3
Bit 10
Bit 2
U
U
0
0
2
2
Freescale Semiconductor
Bit 1
Bit 9
U
U
0
0
1
1
Bit 0
Bit 8
U
U
0
0
0
0