MC908GR16ACFAE Freescale Semiconductor, MC908GR16ACFAE Datasheet - Page 187
![IC MCU 16K FLASH 8MHZ 48-LQFP](/photos/12/18/121866/mc908gr16acfae_sml.jpg)
MC908GR16ACFAE
Manufacturer Part Number
MC908GR16ACFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR16ACFAE.pdf
(270 pages)
Specifications of MC908GR16ACFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR16ACFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908GR16ACFAE
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MC908GR16ACFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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15.7 SIM Registers
The SIM has three memory-mapped registers.
15.7.1 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is only used in emulation mode.
Freescale Semiconductor
CGMXCLK
INT/BREAK
IAB
Address:
Reset:
Note: Previous data can be operand data or the STOP opcode, depending
Read:
CPUSTOP
Write:
R/W
IDB
IAB
on the last instruction.
1. Writing a 0 clears SBSW.
$FE00
Bit 7
R
R
0
Figure 15-19. Stop Mode Recovery from Interrupt
Address
$FE00
$FE01
$FE03
Figure 15-20. Break Status Register (SBSR)
STOP ADDR
STOP +1
= Reserved
Figure 15-18. Stop Mode Entry Timing
R
6
0
MC68HC908GR16A Data Sheet, Rev. 1.0
PREVIOUS DATA
Table 15-4. SIM Registers
R
5
0
STOP ADDR + 1
Register
SBFCR
SRSR
SBSR
STOP + 2
Table 15-4
STOP RECOVERY PERIOD
NEXT OPCODE
R
4
0
STOP + 2
shows the mapping of these registers.
R
3
0
SAME
Access Mode
SP
User
User
User
R
2
0
SAME
SP – 1
Note
SBSW
SAME
1
0
(1)
SAME
SP – 2
Bit 0
R
0
SIM Registers
SP – 3
187
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