MC908GR16ACFAE Freescale Semiconductor, MC908GR16ACFAE Datasheet - Page 35

• Manufacturer Part Number: MC908GR16ACFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$FE0C
$FE0A
$FE0B
$FF7E
$FFFF
$FE08
$FE09
Addr.
1. Non-volatile FLASH register
Break Address Register High
Break Address Register Low
LVI Status Register (LVISR)
Break Status and Control
FLASH Control Register
Register Name
COP Control Register
FLASH Block Protect
Register (BRKSCR)
Register (FLBPR)
See page 235.
See page 235.
See page 235.
See page 113.
See page 38.
See page 43.
See page 81.
(COPCTL)
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 7)
(BRKH)
(FLCR)
(BRKL)
(1)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
LVIOUT
MC68HC908GR16A Data Sheet, Rev. 1.0
BRKE
Bit 15
BPR7
Bit 7
Bit 7
0
0
0
0
0
0
= Unimplemented
BRKA
BPR6
14
6
0
0
0
6
0
0
0
0
BPR5
13
5
0
0
0
5
0
0
0
0
0
Writing clears COP counter (any value)
R = Reserved
Low byte of reset vector
Unaffected by reset
Unaffected by reset
BPR4
12
4
0
0
0
4
0
0
0
0
0
HVEN
BPR3
11
3
0
0
3
0
0
0
0
0
U = Unaffected
MASS
BPR2
10
Input/Output (I/O) Section
2
0
0
2
0
0
0
0
0
ERASE
BPR1
1
0
9
0
1
0
0
0
0
0
BPR0
PGM
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0
0
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