MC908GR16ACFAE Freescale Semiconductor, MC908GR16ACFAE Datasheet - Page 242

• Manufacturer Part Number: MC908GR16ACFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Development Support
19.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
19.3.1.5 Break Signal
A start bit (0) followed by nine 0 bits is a break signal. When the monitor receives a break signal, it drives
the PTA0 pin high for the duration of approximately two bits and then echoes back the break signal.
19.3.1.6 Baud Rate
The communication baud rate is controlled by the crystal frequency or external clock and the state of the
PTB4 pin (when IRQ is set to V
on IRQ and the reset vector blank, then the baud rate is independent of PTB4.
Table 19-1
effective baud rate is the bus frequency divided by 278. If using a crystal as the clock source, be aware
of the upper frequency limit that the internal clock module can handle. See
Characteristics
19.3.1.7 Commands
The monitor ROM firmware uses these commands:
242
•
•
•
•
•
•
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
also lists external frequencies required to achieve a standard baud rate of 7200 bps. The
User
Monitor
Modes
or
START
20.6 3.3-Vdc Electrical Characteristics
BIT
Vector High
0
$FFFE
$FEFE
Reset
BIT 0
1
2
BIT 1
TST
MISSING STOP BIT
3
Vector Low
Figure 19-12. Monitor Data Format
) upon entry into monitor mode. If monitor mode was entered with V
MC68HC908GR16A Data Sheet, Rev. 1.0
$FFFF
$FEFF
Figure 19-13. Break Transaction
4
Reset
BIT 2
Table 19-2. Mode Differences
5
6
BIT 3
Vector High
7
$FFFC
$FEFC
Break
BIT 4
Functions
BIT 5
Vector Low
for this limit.
APPROXIMATELY 2 BITS DELAY
BEFORE ZERO ECHO
$FEFD
$FFFD
Break
BIT 6
0
1
BIT 7
2
Vector High
$FFFC
$FEFC
3
STOP
SWI
BIT
4
20.5 5-Vdc Electrical
START
NEXT
5
BIT
6
Vector Low
Freescale Semiconductor
$FEFD
$FFFD
SWI
7
DD