MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 165

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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11.10.4 TIM Channel Status and Control Registers (TSC0:TSC1)
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0
Figure 11-6. TIM Channel Status and Control Registers (TSC0:TSC1)
Address:
Address:
Each of the TIM channel status and control registers does the following:
CHxF — Channel x Flag Bit
Reset:
Reset:
Read:
Read:
Write:
Write:
When channel x is an input capture channel, this read/write bit is set
when an active edge occurs on the channel x pin. When channel x is
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input
capture trigger
Selects output toggling on TIM overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
$0010
$0013
CH0F
CH1F
Bit 7
Bit 7
0
0
0
0
Timer Interface Module (TIM)
CH0IE
CH1IE
TSC0
TSC1
= Unimplemented
6
0
6
0
MS0B
5
0
5
0
0
MS0A
MS1A
4
0
4
0
ELS0B
ELS1B
3
0
3
0
Timer Interface Module (TIM)
ELS0A
ELS1A
2
0
2
0
TOV0
TOV1
1
0
1
0
I/O Registers
Data Sheet
CH0MAX
CH1MAX
Bit 0
Bit 0
0
0
165

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