MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 235
MC908LD64IFUE
Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LD64IFUE.pdf
(362 pages)
Specifications of MC908LD64IFUE
Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908LD64IFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LD64IFUE
Manufacturer:
FREESCALE
Quantity:
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16.1 Contents
16.2 Introduction
MC68HC908LD64
Freescale Semiconductor
Data Sheet — MC68HC908LD64
—
Rev. 3.0
16.2
16.3
16.4
16.5
16.6
16.6.1
16.6.2
16.6.3
16.6.4
16.6.5
16.6.6
16.6.7
16.7
This DDC12AB Interface module is used by the digital monitor to show
its identification information to the video controller. It contains DDC1
hardware and a two-wire, bidirectional serial bus which is fully
compatible with multi-master IIC bus protocol to support DDC2AB
interface.
This module not only can be applied in internal communications, but can
also be used as a typical command reception serial bus for factory setup
and alignment purposes. It also provides the flexibility of hooking
additional devices to an existing system for future expansion without
adding extra hardware.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 248
I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
DDC Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
DDC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
DDC Address Register (DDCADR) . . . . . . . . . . . . . . . . . . 238
DDC2 Address Register (DDC2ADR) . . . . . . . . . . . . . . . . 239
DDC Control Register (DDCCR) . . . . . . . . . . . . . . . . . . . . 240
DDC Master Control Register (DDCMCR) . . . . . . . . . . . . . 241
DDC Status Register (DDCSR) . . . . . . . . . . . . . . . . . . . . . 244
DDC Data Transmit Register (DDCDTR) . . . . . . . . . . . . . . 246
DDC Data Receive Register (DDCDRR) . . . . . . . . . . . . . . 247
DDC12AB Interface
Section 16. DDC12AB Interface
Data Sheet
235
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