MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 180

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Analog-to-Digital Converter (ADC)
13.4.1 ADC Port I/O Pins
13.4.2 Voltage Conversion
13.4.3 Conversion Time
Data Sheet
180
NOTE:
PTC5/ADC5–PTC0/ADC0 are general-purpose I/O pins that are shared
with the ADC channels. The channel select bits, ADCH[4:0], in the ADC
status and control register define which ADC channel/port pin will be
used as the input signal. The ADC overrides the port I/O logic by forcing
that pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
When the input voltage to the ADC equals to VRH, the ADC converts the
signal to $FF (full scale). If the input voltage equals to VRL, the ADC
converts it to $00. Input voltages between VRH and VRL is a straight-line
linear conversion. All other input voltages will result in $FF if greater than
VRH and $00 if less than VRL.
Input voltage should not exceed the analog supply voltages.
Sixteen ADC internal clocks are required to perform one conversion. The
ADC starts a conversion on the first rising edge of the ADC internal clock
immediately following a write to the ADSCR. If the ADC internal clock is
selected to run at 1MHz, then one conversion will take 16µs to complete.
With a 1MHz ADC internal clock the maximum sample rate is 62.5kHz.
Number of bus cycles = conversion time × bus frequency
Analog-to-Digital Converter (ADC)
Conversion time =
16 to17 ADC cycles
ADC frequency
MC68HC908LD64
Freescale Semiconductor
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Rev. 3.0