MC9S12GC96MFAE Freescale Semiconductor, MC9S12GC96MFAE Datasheet - Page 303
![IC MCU 96K FLASH 25MHZ 48-LQFP](/photos/12/19/121954/mc9s12gc96mfae_sml.jpg)
MC9S12GC96MFAE
Manufacturer Part Number
MC9S12GC96MFAE
Description
IC MCU 96K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC96MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC96MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12GC96MFAE
Manufacturer:
FRE/MOT
Quantity:
20 000
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10.3.2.8
This register contains the interrupt enable bits for the transmit buffer empty interrupt flags.
Read: Anytime
Write: Anytime when not in initialization mode
Freescale Semiconductor
Module Base + 0x0007
TXEIE[2:0]
TXE[2:0]
Field
Field
2:0
2:0
Reset:
W
R
Transmitter Buffer Empty — This flag indicates that the associated transmit message buffer is empty, and thus
not scheduled for transmission. The CPU must clear the flag after a message is set up in the transmit buffer and
is due for transmission. The MSCAN sets the flag after the message is sent successfully. The flag is also set by
the MSCAN when the transmission request is successfully aborted due to a pending abort request (see
Section 10.3.2.9, “MSCAN Transmitter Message Abort Request Register
transmit interrupt is pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx (see
Message Abort Acknowledge Register
is cleared (see
When listen-mode is active (see
cannot be cleared and no transmission is started.
Read and write accesses to the transmit buffer will be blocked, if the corresponding TXEx bit is cleared
(TXEx = 0) and the buffer is scheduled for transmission.
0 The associated message buffer is full (loaded with a message due for transmission)
1 The associated message buffer is empty (not scheduled)
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
MSCAN Transmitter Interrupt Enable Register (CANTIER)
request.
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
Figure 10-11. MSCAN Transmitter Interrupt Enable Register (CANTIER)
Section 10.3.2.9, “MSCAN Transmitter Message Abort Request Register
= Unimplemented
Table 10-11. CANTFLG Register Field Descriptions
Table 10-12. CANTIER Register Field Descriptions
6
0
0
MC9S12C-Family / MC9S12GC-Family
Section 10.3.2.2, “MSCAN Control Register 1
0
0
5
(CANTAAK)”). When a TXEx flag is set, the corresponding ABTRQx bit
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 01.24
NOTE
4
0
0
Description
Description
0
0
3
Section 10.3.2.10, “MSCAN Transmitter
TXEIE2
(CANTARQ)”). If not masked, a
2
0
(CANCTL1)”) the TXEx flags
TXEIE1
(CANTARQ)”).
0
1
TXEIE0
0
0
303
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