MC9S12GC96MFAE Freescale Semiconductor, MC9S12GC96MFAE Datasheet - Page 440
![IC MCU 96K FLASH 25MHZ 48-LQFP](/photos/12/19/121954/mc9s12gc96mfae_sml.jpg)
MC9S12GC96MFAE
Manufacturer Part Number
MC9S12GC96MFAE
Description
IC MCU 96K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC96MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC96MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12GC96MFAE
Manufacturer:
FRE/MOT
Quantity:
20 000
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Chapter 15 Timer Module (TIM16B8CV1) Block Description
440
1. Always read 0x0000.
2. Only writable in special modes (test_mode = 1).
3. Write to these registers have no meaning or effect during input capture.
4. Write has no effect; return 0 on read
0x0024 – 0x002C Reserved
0x002E – 0x002F Reserved
Address Offset
0x000A
0x000B
0x000C
0x000D
0x000E
0x001A
0x001B
0x001C
0x001D
0x001E
0x002D
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
0x0016
0x0017
0x0018
0x0019
0x001F
0x0020
0x0021
0x0022
0x0023
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
Output Compare 7 Mask Register (OC7M)
Output Compare 7 Data Register (OC7D)
Timer Count Register (TCNT(hi))
Timer Count Register (TCNT(lo))
Timer System Control Register1 (TSCR1)
Timer Toggle Overflow Register (TTOV)
Timer Control Register1 (TCTL1)
Timer Control Register2 (TCTL2)
Timer Control Register3 (TCTL3)
Timer Control Register4 (TCTL4)
Timer Interrupt Enable Register (TIE)
Timer System Control Register2 (TSCR2)
Main Timer Interrupt Flag1 (TFLG1)
Main Timer Interrupt Flag2 (TFLG2)
Timer Input Capture/Output Compare Register 0 (TC0(hi))
Timer Input Capture/Output Compare Register 0 (TC0(lo))
Timer Input Capture/Output Compare Register 1 (TC1(hi))
Timer Input Capture/Output Compare Register 1 (TC1(lo))
Timer Input Capture/Output Compare Register 2 (TC2(hi))
Timer Input Capture/Output Compare Register 2 (TC2(lo))
Timer Input Capture/Output Compare Register 3 (TC3(hi))
Timer Input Capture/Output Compare Register 3 (TC3(lo))
Timer Input Capture/Output Compare Register4 (TC4(hi))
Timer Input Capture/Output Compare Register 4 (TC4(lo))
Timer Input Capture/Output Compare Register 5 (TC5(hi))
Timer Input Capture/Output Compare Register 5 (TC5(lo))
Timer Input Capture/Output Compare Register 6 (TC6(hi))
Timer Input Capture/Output Compare Register 6 (TC6(lo))
Timer Input Capture/Output Compare Register 7 (TC7(hi))
Timer Input Capture/Output Compare Register 7 (TC7(lo))
16-Bit Pulse Accumulator Control Register (PACTL)
Pulse Accumulator Flag Register (PAFLG)
Pulse Accumulator Count Register (PACNT(hi))
Pulse Accumulator Count Register (PACNT(lo))
Timer Test Register (TIMTST)
Table 15-2. TIM16B8CV1 Memory Map
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
Use
Freescale Semiconductor
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
(4)
4
(1)
(2)
(3)
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
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