MC9S12GC96MFAE Freescale Semiconductor, MC9S12GC96MFAE Datasheet - Page 502
![IC MCU 96K FLASH 25MHZ 48-LQFP](/photos/12/19/121954/mc9s12gc96mfae_sml.jpg)
MC9S12GC96MFAE
Manufacturer Part Number
MC9S12GC96MFAE
Description
IC MCU 96K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC96MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC96MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12GC96MFAE
Manufacturer:
FRE/MOT
Quantity:
20 000
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Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)
17.4.4
On each reset, the Flash module executes a reset sequence to hold CPU activity while loading the following
registers from the Flash array memory according to
17.4.4.1
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector/array being erased is not guaranteed.
17.4.5
The Flash module can generate an interrupt when all Flash commands have completed execution or the
Flash address, data, and command buffers are empty.
17.4.5.1
Figure 17-26
The Flash module uses the CBEIF and CCIF flags in combination with the enable bits CBIE and CCIE to
discriminate for the generation of interrupts.
For a detailed description of these register bits, refer to
(FCNFG)”
502
•
•
FPROT — Flash Protection Register (see
FSEC — Flash Security Register (see
Flash Address, Data, and Command
Buffers are empty
All Flash commands have completed
execution
and
Flash Reset Sequence
Interrupts
Reset While Flash Command Active
Description of Interrupt Operation
shows the logic used for generating interrupts.
Vector addresses and their relative interrupt priority are determined at the
MCU level.
Section 17.3.2.6, “Flash Status Register
Interrupt Source
CBEIE
CBEIF
CCIE
CCIF
Figure 17-26. Flash Interrupt Implementation
Table 17-16. Flash Interrupt Sources
MC9S12C-Family / MC9S12GC-Family
Section
(FSTAT register)
(FSTAT register)
Interrupt Flag
Rev 01.24
NOTE
Section
CBEIF
CCIF
Table
17.3.2.2)
Section 17.3.2.4, “Flash Configuration Register
FLASH INTERRUPT REQUEST
(FSTAT)”.
17.3.2.5)
17-1:
Local Enable
CBEIE
CCIE
Global (CCR) Mask
Freescale Semiconductor
I Bit
I Bit
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