HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 31

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 1-9
Notes on Bit Manipulation Instructions: BSET, BCLR, BNOT, BST, and BIST are read-
modify-write instructions. They read a byte of data, modify one bit in the byte, then write the byte
back. Care is required when these instructions are applied to registers with write-only bits and to
the I/O port registers.
Example 1: BCLR is executed to clear bit 0 in port control register 4 (PCR4) under the following
conditions.
P4
P4
P4
The intended purpose of this BCLR instruction is to switch P4
Instruction
EEPMOV
Sequence
1 Read
2 Modify
3 Write
7
6
5
:
:
– P4
0
: Output pins, Low
Input pin, Low
Input pin, High
Block Data Transfer Instruction
Size*
Operation
Read one data byte at the specified address
Modify one bit in the data byte
Write the modified data byte back to the specified address
Function
if R4L
else next;
Moves a data block according to parameters set in general
registers
R4L, R5, and R6.
R4L: size of block (bytes)
R5: starting source address
R6: starting destination address
Execution of the next instruction starts as soon as the block
transfer is completed.
This instruction is for writing to the large-capacity EEPROM
provided on chip with some models in the H8/300L Series. For
details see the applicable hardware manual.
repeat @R5+
until R4L = 0
0 then
R4L – 1
@R6+
R4L
Rev. 2.00 Dec 27, 2004 page 17 of 128
0
from output to input.
REJ09B0214-0200
Section 1 CPU