HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 76

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 2 Instruction Set
Rev. 2.00 Dec 27, 2004 page 62 of 128
REJ09B0214-0200
2.2.23
Operation
Rd (decimal adjust)
Assembly-Language Format
DAA Rd
Operand Size
Byte
Description
When the result of an addition operation performed by the ADD.B or ADDX instruction on 4-bit
BCD data is contained in an 8-bit general register and the carry and half-carry flags, the DAA
instruction adjusts the result by adding H'00, H'06, H'60, or H'66 to the general register
according to the table below.
Valid results are not assured if this instruction is executed under conditions other than those
stated above.
Status before adjustment
C flag
0
0
0
0
0
0
1
1
1
DAA (decimal adjust add)
Upper nibble
0 – 9
0 – 8
0 – 9
A – F
9 – F
A – F
0 – 2
0 – 2
0 – 3
Rd
H flag
0
0
1
0
0
1
0
0
1
Condition Code
I: Previous value remains unchanged.
H: Unpredictable.
N: Set to 1 when the adjusted result is negative;
Z: Set to 1 when the adjusted result is zero;
V: Unpredictable.
C: Set to 1 when there is a carry from bit 7;
otherwise cleared to 0.
otherwise cleared to 0.
otherwise left unchanged.
— —
I
Lower nibble
0 – 9
A – F
0 – 3
0 – 9
A – F
0 – 3
0 – 9
A – F
0 – 3
H
*
N
Value
added
H'00
H'06
H'06
H'60
H'66
H'66
H'60
H'66
H'66
Z
V
*
C
Resulting
C flag
0
0
0
1
1
1
1
1
1
DAA

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