HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 92

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 Instruction Set
Rev. 2.00 Dec 27, 2004 page 78 of 128
REJ09B0214-0200
2.2.32 (6) MOV (move data) (word)
Operation
Rs
Assembly-Language Format
MOV.W Rs, <EAd>
Operand Size
Word
Description
This instruction moves one word of data from a general register to memory and sets condition
code flags according to the data value.
The destination address in memory must be even.
MOV.W Rs, @–R7 is identical in machine language to PUSH.W Rs.
The instruction MOV.W Rn, @–Rn decrements register Rn by 2, then moves the decremented
result to memory.
Note that the LSIs in the H8/300L Series contain on-chip peripheral modules for which access in
word size is not possible. Details are given in the applicable hardware manual.
Instruction Formats and Number of Execution States
Register indirect
Register indirect
with displacement
Register indirect
with pre-decrement MOV.W
Absolute address
Addressing
mode
(EAd)
Mnem.
MOV.W
MOV.W
MOV.W
Rs, @Rd
Rs,
@(d:16, Rd)
Rs, @-Rd
Rs, @aa:16
Operands
Condition Code
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to 1 when the data value is negative;
Z: Set to 1 when the data value is zero;
V: Cleared to 0.
C: Previous value remains unchanged.
otherwise cleared to 0.
otherwise cleared to 0.
1st byte
6
6
6
6
— — — —
I
9 1 rd 0 rs
F 1 rd 0 rs
D 1 rd 0 rs
B
2nd byte
8
H
Instruction code
0 rs
N
3rd byte
Z
V
disp.
abs.
0
4th byte
—
C
No. of
states
MOV
4
6
6
6