HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 40

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 CPU
1.3.4
Table 1-10 lists the eight addressing modes and their assembly-language notation. Each instruction
can use a specific subset of these addressing modes.
Arithmetic, logic, and shift instructions use register direct addressing (1). The ADD.B, ADDX,
SUBX, CMP.B, AND, OR, and XOR instructions can also use immediate addressing (6).
The MOV instruction uses all the addressing modes except program-counter relative (7) and
memory indirect (8).
Bit manipulation instructions use register direct (1), register indirect (2), or absolute (5) addressing
to identify a byte operand and 3-bit immediate addressing to identify a bit within the byte. The
BSET, BCLR, BNOT, and BTST instructions can also use register direct addressing (1) to identify
the bit.
Table 1-10 Addressing Modes
(1) Register Direct—Rn: The register field of the instruction specifies an 8- or 16-bit general
register containing the operand. In most cases the general register is accessed as an 8-bit register.
Only the MOV.W, ADD.W, SUB.W, CMP.W, ADDS, SUBS, MULXU (8 bits 8 bits), and
DIVXU (16 bits ÷ 8 bits) instructions have 16-bit operands.
(2) Register Indirect—@Rn: The register field of the instruction specifies a 16-bit general
register containing the address of the operand.
Rev. 2.00 Dec 27, 2004 page 26 of 128
REJ09B0214-0200
No.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Addressing Modes and Effective Address Calculation
Mode
Register direct
Register indirect
Register indirect with 16-bit displacement
Register indirect with post-increment
Register indirect with pre-decrement
Absolute address (8 or 16 bits)
Immediate (3-, 8-, or 16-bit data)
PC-relative (8-bit displacement)
Memory indirect
@(d:16, Rn)
@aa:8, @aa:16
#xx:3, #xx:8, #xx:16
@(d:8, PC)
Notation
Rn
@Rn
@Rn+
@–Rn
@@aa:8