HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 42

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 1 CPU
If an odd address is specified as a branch destination or as the operand address of a MOV.W
instruction, the least significant bit is regarded as 0, causing word access to be performed at the
address preceding the specified address. See the memory data structure description in section
1.1.2, Data Structure.
Effective Address Calculation
Table 1-11 explains how the effective address is calculated in each addressing mode.
Table 1-11 Effective Address Calculation (1)
Rev. 2.00 Dec 27, 2004 page 28 of 128
REJ09B0214-0200
No. instruction format
1
2
15
Addr essing mode,
Register direct Rn
Register indirect @Rn
15
OP
OP
8 7
7 6
reg m
reg
4 3
4 3
reg n
0
0
Effective address
calculation
None
15
16-bit register contents
0
15
Operands are contained in
registers m and n
Effective
address
Operand is at address
indicated by register
3
reg m
0
3
reg n
0
0

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