HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 58

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 2 Instruction Set
Rev. 2.00 Dec 27, 2004 page 44 of 128
REJ09B0214-0200
Bcc (branch conditionally)
Description
If the specified condition is false, this instruction does nothing; the next instruction is executed.
If the specified condition is true, a signed displacement is added to the address of the next
instruction and execution branches to the resulting address.
The displacement is a signed 8-bit value which must be even. The branch destination address
can be located in the range –126 to +128 bytes from the address of the Bcc instruction.
The applicable conditions and their mnemonics are given below.
BT, BF, BHS, and BLO are synonyms for BRA, BRN, BCC, and BCS, respectively.
Mnemonic
BRA (BT)
BRN (BF)
BHI
BLS
BCC (BHS)
BCS (BLO)
BNE
BEQ
BVC
BVS
BPL
BMI
BGE
BLT
BGT
BLE
cc Field
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Description
Always (True)
Never (False)
High
Low or Same
Carry Clear
(High or Same)
Carry Set (Low)
Not Equal
Equal
Overflow Clear
Overflow Set
Plus
Minus
Greater or Equal
Less Than
Greater Than
Less or Equal
Condition
Always true
Never
C
C
C = 0
C = 1
Z = 0
Z = 1
V = 0
V = 1
N = 0
N = 1
N
N
Z
Z
(N
(N
Z = 0
Z = 1
V = 0
V = 1
V) = 0
V) = 1
Meaning
X > Y (Unsigned)
X
X
X < Y (Unsigned)
X
X = Y (Signed or
X
X < Y (Signed)
X > Y (Signed)
X
Y (Signed)
Y (Unsigned)
Y (Unsigned)
Y (Signed or
Y (Signed)
unsigned)
unsigned)
Bcc