PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 214
PIC18LF2431-I/SP
Manufacturer Part Number
PIC18LF2431-I/SP
Description
IC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16LF627A-IP.pdf
(8 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC18F2331-ISO.pdf
(392 pages)
5.PIC18F2331-ISO.pdf
(8 pages)
6.PIC18F2331-ISO.pdf
(6 pages)
7.PIC18F2331-ISO.pdf
(16 pages)
8.PIC18LF2331-ISO.pdf
(4 pages)
9.PIC18LF2331-ISO.pdf
(40 pages)
10.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18LF2431-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC16LF627A-IP PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18F2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- PIC18LF2331-ISO PDF datasheet #9
- PIC18F4331-EP PDF datasheet #10
- Current page: 214 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
19.3.1.2
When the R/W bit of the address byte is clear and an
address match occurs, the R/W bit of the SSPSTAT
register is cleared. The received address is loaded into
the SSPBUF register.
FIGURE 19-6:
DS39616D-page 214
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
S
A7 A6 A5 A4 A3 A2 A1
1
Reception
2
Receiving Address
3
4
I
2
C™ WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
5
6
R/W = 0
7
8
ACK
9
D7
1
D6
2
SSPBUF register is read
Receiving Data
D5
3
Cleared in software
D4
4
SSPOV bit is set because the SSPBUF register is still full
D3
5
D2
6
When the address byte overflow condition exists, then
the no Acknowledge (ACK) pulse is given. An overflow
condition is defined as either bit BF (SSPSTAT<0>) is
set, or bit SSPOV (SSPCON<6>) is set. This is an error
condition due to the user’s firmware.
An SSP interrupt is generated for each data transfer
byte. Flag bit, SSPIF (PIR1<3>), must be cleared in
software. The SSPSTAT register is used to determine
the status of the byte.
D1
7
D0
8
ACK
9
D7
1
D6
2
D5
Receiving Data
3
D4
4
2010 Microchip Technology Inc.
ACK is not sent
D3
5
D2
6
D1
7
D0
8
ACK
9
Bus master
terminates
transfer
P
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