PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 47

IC MCU FLASH 8KX16 28-DIP

PIC18LF2431-I/SP

Manufacturer Part Number
PIC18LF2431-I/SP
Description
IC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2431-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
5.0
The PIC18F2331/2431/4331/4431 devices differentiate
between various kinds of Reset:
a)
b)
c)
d)
e)
f)
g)
h)
FIGURE 5-1:
 2010 Microchip Technology Inc.
Note 1: See
OSC1
MCLR
V
DD
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during Sleep
Watchdog Timer (WDT) Reset (during
execution)
Programmable Brown-out Reset (BOR)
RESET Instruction
Stack Full Reset
Stack Underflow Reset
RESET
Instruction
RESET
INTRC
OST/PWRT
Pointer
32 s
Stack
Table 5-1
Brown-out
( )_IDLE
V
Time-out
Detect
DD
Sleep
Reset
WDT
Rise
OST
PWRT
Stack Full/Underflow Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External Reset
for time-out situations.
MCLRE
10-Bit Ripple Counter
11-Bit Ripple Counter
POR Pulse
BOREN
1024 Cycles
65.5 ms
PIC18F2331/2431/4331/4431
This section discusses Resets generated by MCLR,
POR and BOR, and the operation of the various start-
up timers. Stack Reset events are covered in
Section 6.1.2.4 “Stack Full/Underflow
WDT Resets are covered in
Timer
A simplified block diagram of the On-Chip Reset Circuit
is shown in
(WDT)”.
Figure
5-1.
S
R
Section 23.2 “Watchdog
DS39616D-page 47
Q
Enable OST
Enable PWRT
Chip_Reset
Resets”.
(1)

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